VGETMANTSD

VGETMANTSD returns the significand of the low double of its second source, scaled into the interval that the immediate picks, and copies bits 127:64 from the first source. It is the scalar form of VGETMANTPD. VGETMANTPS has the table of the immediate’s two fields: bits 1:0 choose [1, 2), [1/2, 2), [1/2, 1) or [3/4, 3/2), and bits 3:2 keep the sign, clear it or turn negative inputs into the default NaN. That page also lists the special inputs: zero and infinity give 1.0 with their sign. With VGETEXPSD, which returns the exponent, it splits a double as frexp does, and VGETMANTSS is the single-precision form. The EVEX encoding adds a write mask on the one element and {sae}.

Recorded on Zen 5#

• Interval 0. With the immediate 0, -2^31 gave -1.0: the significand in [1, 2) with the input’s sign. Bits 127:64 came from XMM8, the first source.
• Masked off with zeroing. With bit 0 of K1 clear, the low double became zero and the upper one still came from the first source.

In compiled code#

At -O2 with -march=x86-64-v4, GCC 14 and Clang 23 call the library for frexp even with -ffast-math. _mm_getmant_sd(a, b, interval, sign) compiles to VGETMANTSD with the two enums combined into the immediate, _MM_MANT_NORM_1_2 with _MM_MANT_SIGN_src giving 0.

AMD’s Zen 5 latency spreadsheet gives one macro-op and 3 cycles, on pipes FP2 and FP3.

In the optimization guide

What the optimization guide says about VGETMANTSD, a line per claim. Each links to the claim in the guide, with its sources and where they differ.

Golden Cove and Raptor Cove

• Vectors, AVX-512 and AMX: VPERMD, VPERMQ, VPERMPS, VPERMPD, VPMULLQ, vrange, vgetmant and the half-precision complex multiplications wait for the old value of their destination, which they then overwrite.

Forms

Latency and throughput

Data flow

Where the elements of the sources go, element 0 on the right; results that depend on a control value are drawn for an example. How to read.

Operation

What the forms do, in pseudocode that our tests run against results recorded on real processors. How to read.

if k1[0]:
    xmm1.f64[0] = getmant(src3.f64[0], imm8)
elif zeroing:
    xmm1.f64[0] = 0
# else: xmm1.f64[0] keeps its value
xmm1.q[1] = xmm2.q[1]
# {sae}: no exception flags
# imm8[1:0]: [1, 2), [1/2, 2), [1/2, 1), [3/4, 3/2); bit 2: no sign; bit 3: negative gives NaN
# xmm1 is zeroed from bit 128 up

Operands

Flags

None: XED records no flag that the forms test or change.

Exceptions

The exception class is XED's name for the set of exception conditions that a form follows. How to read.

All forms

AVX512-E3

Attributes

What else XED records about the forms. How to read.

All forms

write masking; follows MXCSR

Memory forms

memory fault suppression

Intrinsics

The C intrinsics of Clang 23.1.2 that compile to VGETMANTSD, each with the form it compiles to and the Clang options it needs. The forms come from compiling every intrinsic and decoding the result with Intel XED; all intrinsics A–Z explains the method.

CPUID and processors

Each form belongs to an XED ISA set. A form can be used when the processor reports every CPUID bit of one of its ISA set's alternatives.

More AVX10.1 instructions

• VFNMSUB231SS
• VFPCLASSPD
• VFPCLASSPH
• VFPCLASSPS
• VFPCLASSSD
• VFPCLASSSH
• VFPCLASSSS
• VGATHERDPD
• VGATHERDPS
• VGATHERQPD
• VGATHERQPS
• VGETEXPPD
• VGETEXPPH
• VGETEXPPS
• VGETEXPSD
• VGETEXPSH
• VGETEXPSS
• VGETMANTPD
• VGETMANTPH
• VGETMANTPS
• VGETMANTSH
• VGETMANTSS
• VGF2P8AFFINEINVQB
• VGF2P8AFFINEQB
• VGF2P8MULB
• VINSERTF32X4
• VINSERTF32X8
• VINSERTF64X2
• VINSERTF64X4
• VINSERTI32X4
• VINSERTI32X8
• VINSERTI64X2
• VINSERTI64X4
• VINSERTPS
• VMAXPD
• VMAXPH
• VMAXPS
• VMAXSD
• VMAXSH
• VMAXSS

All 686 AVX10.1 instructions