VGETMANTSS

VGETMANTSS returns the significand of the low single of its second source, scaled into the interval that the immediate picks, and copies bits 127:32 from the first source. It is the scalar form of VGETMANTPS, whose page has the immediate’s two fields, the interval in bits 1:0 and the sign rule in bits 3:2, and the special inputs, and with VGETEXPSS it splits a single into significand and exponent. VGETMANTSD is the double-precision form. The EVEX encoding adds a write mask on the one element and {sae}.

Recorded on Zen 5#

• Interval 2, [1/2, 1). -2.5, which is -1.25 times 2, gave -0.625 (BF200000h), the significand halved as frexpf returns it, with the input’s sign.
• Negative zero. With the same immediate, -0.0 from memory gave -1.0, outside the interval: zero always gives 1.0 with its sign.

In compiled code#

At -O2 with -march=x86-64-v4, GCC 14 and Clang 23 call the library for frexpf even with -ffast-math. Both compile _mm_getmant_ss(a, b, _MM_MANT_NORM_p5_1, _MM_MANT_SIGN_zero) to VGETMANTSS with the immediate 6.

AMD’s Zen 5 latency spreadsheet gives one macro-op and 3 cycles, on pipes FP2 and FP3.

In the optimization guide

What the optimization guide says about VGETMANTSS, a line per claim. Each links to the claim in the guide, with its sources and where they differ.

Golden Cove and Raptor Cove

• Vectors, AVX-512 and AMX: VPERMD, VPERMQ, VPERMPS, VPERMPD, VPMULLQ, vrange, vgetmant and the half-precision complex multiplications wait for the old value of their destination, which they then overwrite.

Forms

Latency and throughput

Data flow

Where the elements of the sources go, element 0 on the right; results that depend on a control value are drawn for an example. How to read.

Operation

What the forms do, in pseudocode that our tests run against results recorded on real processors. How to read.

if k1[0]:
    xmm1.f32[0] = getmant(src3.f32[0], imm8)
elif zeroing:
    xmm1.f32[0] = 0
# else: xmm1.f32[0] keeps its value
for i in range(1, 4):
    xmm1.d[i] = xmm2.d[i]
# {sae}: no exception flags
# imm8[1:0]: [1, 2), [1/2, 2), [1/2, 1), [3/4, 3/2); bit 2: no sign; bit 3: negative gives NaN
# xmm1 is zeroed from bit 128 up

Operands

Flags

None: XED records no flag that the forms test or change.

Exceptions

The exception class is XED's name for the set of exception conditions that a form follows. How to read.

All forms

AVX512-E3

Attributes

What else XED records about the forms. How to read.

All forms

write masking; follows MXCSR

Memory forms

memory fault suppression

Intrinsics

The C intrinsics of Clang 23.1.2 that compile to VGETMANTSS, each with the form it compiles to and the Clang options it needs. The forms come from compiling every intrinsic and decoding the result with Intel XED; all intrinsics A–Z explains the method.

CPUID and processors

Each form belongs to an XED ISA set. A form can be used when the processor reports every CPUID bit of one of its ISA set's alternatives.

More AVX10.1 instructions

• VFPCLASSPH
• VFPCLASSPS
• VFPCLASSSD
• VFPCLASSSH
• VFPCLASSSS
• VGATHERDPD
• VGATHERDPS
• VGATHERQPD
• VGATHERQPS
• VGETEXPPD
• VGETEXPPH
• VGETEXPPS
• VGETEXPSD
• VGETEXPSH
• VGETEXPSS
• VGETMANTPD
• VGETMANTPH
• VGETMANTPS
• VGETMANTSD
• VGETMANTSH
• VGF2P8AFFINEINVQB
• VGF2P8AFFINEQB
• VGF2P8MULB
• VINSERTF32X4
• VINSERTF32X8
• VINSERTF64X2
• VINSERTF64X4
• VINSERTI32X4
• VINSERTI32X8
• VINSERTI64X2
• VINSERTI64X4
• VINSERTPS
• VMAXPD
• VMAXPH
• VMAXPS
• VMAXSD
• VMAXSH
• VMAXSS
• VMINPD
• VMINPH

All 686 AVX10.1 instructions