VMINBF16

VMINBF16 keeps the smaller bfloat16 value of each pair, 8, 16 or 32 pairs per register, by the rule of VMINPS: the first source comes back only when it is less than the second, and the second source otherwise, so two zeros of either sign or a NaN in either source give the second source. It is the mirror image of VMAXBF16, whose page shows what Clang makes of both, and belongs to AVX10.2, with denormal inputs read as zeros, no exceptions and no MXCSR, as VADDBF16’s page explains. The opcode is 5Dh in EVEX map 5 with the 66 prefix and W0, the byte of VMINPH, which has no prefix; it takes a write mask and a broadcast from 16 bits of memory, and has no scalar form.

Order matters#

Because the second source wins every tie and every NaN, VMINBF16 is not commutative: VMINBF16(-0, +0) is +0 and VMINBF16(+0, -0) is -0, and a NaN disappears or survives depending on its side. Under DAZ more pairs tie: a denormal and a zero, or two denormals of any sign, all give the second source. VMINMAXBF16 offers the IEEE 754-2019 minimum, which orders -0 below +0 and returns a NaN from either side.

In our builds#

GCC 14 has no AVX10.2 option. Clang 23 at -O2 with -mavx10.2 vectorizes Z[i] = X[i] < Y[i] ? X[i] : Y[i] over global __bf16 arrays into VMINBF16 with Y from memory. fminf on the elements takes VMINBF16 with the operands swapped, then a compare for unordered and a masked VMOVDQU16 that keeps Y where X is a NaN. With -ffast-math, Clang 23.1.2 stops with “Cannot select” on X86ISD::FMINC for X[i] < 0 ? X[i] : 0 and for _mm_min_pbh, as it does for the maximum. No AVX10.2 processor appears in this site’s recorded cases.

Forms

Data flow

Where the elements of the sources go, element 0 on the right; results that depend on a control value are drawn for an example. How to read.

Operation

What the forms do, in pseudocode that our tests run against results recorded on real processors. How to read.

for i in range(VL // 16):
    if k1[i]:
        a = zmm2.bf16[i]
        b = src3.bf16[i]
        zmm1.bf16[i] = fmin(a, b)
    elif zeroing:
        zmm1.bf16[i] = 0
    # else: zmm1.bf16[i] keeps its value
# a NaN or two zeros: b
# m16bcst: src3.bf16[i] is the m16 for every i
# BF16: to nearest even, denormals flushed, no flags; MXCSR unused
# zmm1 is zeroed from bit VL up

Operands

Flags

None: XED records no flag that the forms test or change.

Exceptions

The exception class is XED's name for the set of exception conditions that a form follows. How to read.

All forms

AVX512-E4

Attributes

What else XED records about the forms. How to read.

All forms

write masking; denormal inputs read as zero; denormal results flushed to zero

Memory forms

embedded broadcast (tuple Full); memory fault suppression

Intrinsics

The C intrinsics of Clang 23.1.2 that compile to VMINBF16, each with the form it compiles to and the Clang options it needs. The forms come from compiling every intrinsic and decoding the result with Intel XED; all intrinsics A–Z explains the method.

CPUID and processors

Each form belongs to an XED ISA set. A form can be used when the processor reports every CPUID bit of one of its ISA set's alternatives.

More AVX10.2 instructions

• VCVTTSS2SIS
• VCVTTSS2USIS
• VDIVBF16
• VDPPHPS
• VFMADD132BF16
• VFMADD213BF16
• VFMADD231BF16
• VFMSUB132BF16
• VFMSUB213BF16
• VFMSUB231BF16
• VFNMADD132BF16
• VFNMADD213BF16
• VFNMADD231BF16
• VFNMSUB132BF16
• VFNMSUB213BF16
• VFNMSUB231BF16
• VFPCLASSBF16
• VGETEXPBF16
• VGETMANTBF16
• VMAXBF16
• VMINMAXBF16
• VMINMAXPD
• VMINMAXPH
• VMINMAXPS
• VMINMAXSD
• VMINMAXSH
• VMINMAXSS
• VMOVD
• VMOVW
• VMPSADBW
• VMULBF16
• VPDPBSSD
• VPDPBSSDS
• VPDPBSUD
• VPDPBSUDS
• VPDPBUUD
• VPDPBUUDS
• VPDPWSUD
• VPDPWSUDS
• VPDPWUSD

All 96 AVX10.2 instructions