VMINMAXSS

VMINMAXSS applies one of the eight IEEE 754-2019 minimum and maximum operations to the low singles of two sources and copies bits 127:32 from the first. The immediate is the one that VMINMAXPS’s page decodes, and the rules for NaNs, signed zeros and equal magnitudes are on VMINMAXPD’s page. Its opcode is 53h in EVEX map 0F3A with a 66 prefix and W0 (VMINMAXSD has W1); the second source may be four bytes of memory, the vector length is ignored, and it takes a write mask on its one element and {sae}. VMINMAXSD compares it with the classic scalar minimum.

Denormals and exceptions#

As for the packed form, a signaling NaN raises the invalid exception and a denormal input, when neither input is a NaN, the denormal one; MXCSR.DAZ applies to the inputs. The bfloat16 version, VMINMAXBF16, has no scalar form and ignores MXCSR.

In our builds#

GCC 14 has no AVX10.2 option. Clang 23 with -mavx10.2 compiles __builtin_elementwise_minimum(a, b) on two floats to one VMINMAXSS with immediate 4. It also uses VMINMAXSS for a single __bf16: __builtin_elementwise_maximum on two of them shifts both into floats, takes the maximum with immediate 5 and narrows the result with VCVTNEPS2BF16. No AVX10.2 processor appears in this site’s recorded cases.

Forms

Data flow

Where the elements of the sources go, element 0 on the right; results that depend on a control value are drawn for an example. How to read.

Operation

What the forms do, in pseudocode that our tests run against results recorded on real processors. How to read.

if k1[0]:
    a = xmm2.f32[0]
    b = src3.f32[0]
    xmm1.f32[0] = fminmax(a, b, imm8)
elif zeroing:
    xmm1.f32[0] = 0
# else: xmm1.f32[0] keeps its value
for i in range(1, 4):
    xmm1.d[i] = xmm2.d[i]
# {sae}: no exception flags
# imm8[1:0]: min, max, min |x|, max |x|; bit 4: a NaN yields; [3:2]: sign of a, own, 0, 1
# xmm1 is zeroed from bit 128 up

Operands

Flags

None: XED records no flag that the forms test or change.

Exceptions

The exception class is XED's name for the set of exception conditions that a form follows. How to read.

All forms

AVX512-E3

Attributes

What else XED records about the forms. How to read.

All forms

write masking; follows MXCSR

Memory forms

memory fault suppression

Intrinsics

The C intrinsics of Clang 23.1.2 that compile to VMINMAXSS, each with the form it compiles to and the Clang options it needs. The forms come from compiling every intrinsic and decoding the result with Intel XED; all intrinsics A–Z explains the method.

CPUID and processors

Each form belongs to an XED ISA set. A form can be used when the processor reports every CPUID bit of one of its ISA set's alternatives.

More AVX10.2 instructions

• VFMSUB132BF16
• VFMSUB213BF16
• VFMSUB231BF16
• VFNMADD132BF16
• VFNMADD213BF16
• VFNMADD231BF16
• VFNMSUB132BF16
• VFNMSUB213BF16
• VFNMSUB231BF16
• VFPCLASSBF16
• VGETEXPBF16
• VGETMANTBF16
• VMAXBF16
• VMINBF16
• VMINMAXBF16
• VMINMAXPD
• VMINMAXPH
• VMINMAXPS
• VMINMAXSD
• VMINMAXSH
• VMOVD
• VMOVW
• VMPSADBW
• VMULBF16
• VPDPBSSD
• VPDPBSSDS
• VPDPBSUD
• VPDPBSUDS
• VPDPBUUD
• VPDPBUUDS
• VPDPWSUD
• VPDPWSUDS
• VPDPWUSD
• VPDPWUSDS
• VPDPWUUD
• VPDPWUUDS
• VRCPBF16
• VREDUCEBF16
• VRNDSCALEBF16
• VRSQRTBF16

All 96 AVX10.2 instructions