VMULBF16

VMULBF16 multiplies bfloat16 values element by element, 8, 16 or 32 pairs per register, with the fixed rules that VADDBF16’s page sets out: rounding to nearest even, denormal inputs and results taken as zeros, no exceptions and no MXCSR. It belongs to AVX10.2. Its opcode is 59h in EVEX map 5 with the 66 prefix and W0, the byte of VMULPH, which has no prefix; it takes a write mask and a broadcast from 16 bits of memory, and there is no scalar form.

Exact in a single#

A bfloat16 has 8 significant bits, so the product of two has at most 16, which a single holds exactly as long as it stays in the normal range. Widening both factors, multiplying with VMULSS and narrowing with VCVTNEPS2BF16 therefore rounds only once, and matches VMULBF16 for normal operands and results. Products that pass the largest bfloat16 become infinity in both. They part on denormals, which VMULBF16 reads and returns as zeros.

In our builds#

GCC 14 has no AVX10.2 option. Clang 23 at -O2 with -mavx10.2 vectorizes Z[i] = X[i] * Y[i] over global __bf16 arrays into VMULBF16 on zmm registers with the second source from memory, and a single __bf16 product into the VMULSS sequence above. With -ffast-math it also uses VMULBF16 for X[i] / 3, with the rounded reciprocal of 3 as a constant, and for ldexpf(X[i], 3), a multiplication by 8, which without that option is a library call per element. No AVX10.2 processor appears in this site’s recorded cases.

Forms

Data flow

Where the elements of the sources go, element 0 on the right; results that depend on a control value are drawn for an example. How to read.

Operation

What the forms do, in pseudocode that our tests run against results recorded on real processors. How to read.

for i in range(VL // 16):
    if k1[i]:
        a = zmm2.bf16[i]
        b = src3.bf16[i]
        zmm1.bf16[i] = mul(a, b)
    elif zeroing:
        zmm1.bf16[i] = 0
    # else: zmm1.bf16[i] keeps its value
# m16bcst: src3.bf16[i] is the m16 for every i
# BF16: to nearest even, denormals flushed, no flags; MXCSR unused
# zmm1 is zeroed from bit VL up

Operands

Flags

None: XED records no flag that the forms test or change.

Exceptions

The exception class is XED's name for the set of exception conditions that a form follows. How to read.

All forms

AVX512-E4

Attributes

What else XED records about the forms. How to read.

All forms

write masking; always rounds to nearest even; denormal inputs read as zero; denormal results flushed to zero

Memory forms

embedded broadcast (tuple Full); memory fault suppression

Intrinsics

The C intrinsics of Clang 23.1.2 that compile to VMULBF16, each with the form it compiles to and the Clang options it needs. The forms come from compiling every intrinsic and decoding the result with Intel XED; all intrinsics A–Z explains the method.

CPUID and processors

Each form belongs to an XED ISA set. A form can be used when the processor reports every CPUID bit of one of its ISA set's alternatives.

More AVX10.2 instructions

• VFNMADD213BF16
• VFNMADD231BF16
• VFNMSUB132BF16
• VFNMSUB213BF16
• VFNMSUB231BF16
• VFPCLASSBF16
• VGETEXPBF16
• VGETMANTBF16
• VMAXBF16
• VMINBF16
• VMINMAXBF16
• VMINMAXPD
• VMINMAXPH
• VMINMAXPS
• VMINMAXSD
• VMINMAXSH
• VMINMAXSS
• VMOVD
• VMOVW
• VMPSADBW
• VPDPBSSD
• VPDPBSSDS
• VPDPBSUD
• VPDPBSUDS
• VPDPBUUD
• VPDPBUUDS
• VPDPWSUD
• VPDPWSUDS
• VPDPWUSD
• VPDPWUSDS
• VPDPWUUD
• VPDPWUUDS
• VRCPBF16
• VREDUCEBF16
• VRNDSCALEBF16
• VRSQRTBF16
• VSCALEFBF16
• VSQRTBF16
• VSUBBF16
• VUCOMXSD

All 96 AVX10.2 instructions