VPANDD

VPANDD is the EVEX form of VPAND: the bitwise AND of two 128-, 256- or 512-bit values, with a write mask that selects doublewords. The AND itself knows no elements; the D names only the mask and the broadcast. VPANDQ is the same with quadwords, and without a mask or a broadcast the two give the same bits. What the EVEX form adds to VPAND:

• Masking. On Zen 5, vpandd ymm0{k3}, ymm31, [mem] with EBh in the low byte of K3 wrote the AND to doublewords 0, 1, 3, 5, 6 and 7, kept 2 and 4 of YMM0 and cleared the bits from 256 up. With {z}, vpandd ymm14{k3}{z}, ymm8, ymm29 set doublewords 2 and 4 to 0.
• Broadcast. The memory operand may be one doubleword repeated to every element, {1to16} at 512 bits: GCC 14 compiles _mm512_and_epi32(x, _mm512_set1_epi32(*p)) to vpandd zmm0, zmm0, dword ptr [rdi]{1to16}, while Clang 23 broadcasts the value into a register first.
• Registers 16 to 31 and ZMM registers, which VEX cannot name.

Which name the compilers pick#

GCC 14 at -O2 follows the C type. With -march=x86-64-v4, a[i] = b[i] & c[i] over int arrays becomes VPANDD on zmm registers and over long long arrays VPANDQ; _mm512_and_si512 is VPANDD, and the masked _mm512_mask_and_epi32 and _mm512_maskz_and_epi32 are VPANDD with a merging or zeroing mask. Clang 23 picks by encoding instead. With -mavx512f it emits VPANDD for the int loop and the masked intrinsics but VPANDQ for _mm512_and_si512; with -march=x86-64-v4, whose AVX512DQ brings an EVEX VANDPS, it uses VANDPS for all of them (on ymm registers in the loop), masked ones included, since a masked VANDPS selects the same 32-bit elements.

AMD’s Zen 5 latency spreadsheet gives the EVEX row of VPANDD what it gives VPAND: one cycle and four per cycle on any of the four vector pipes. Zen 5’s 6 recorded cases cover the register and memory forms, broadcast included, at all three widths.

Forms

Latency and throughput

Data flow

Where the elements of the sources go, element 0 on the right; results that depend on a control value are drawn for an example. How to read.

Operation

What the forms do, in pseudocode that our tests run against results recorded on real processors. How to read.

for i in range(VL // 32):
    if k1[i]:
        zmm1.d[i] = zmm2.d[i] & src3.d[i]
    elif zeroing:
        zmm1.d[i] = 0
    # else: zmm1.d[i] keeps its value
# m32bcst: src3.d[i] is the m32 for every i
# zmm1 is zeroed from bit VL up

Operands

Flags

None: XED records no flag that the forms test or change.

Exceptions

The exception class is XED's name for the set of exception conditions that a form follows. How to read.

All forms

AVX512-E4

Attributes

What else XED records about the forms. How to read.

All forms

write masking

Memory forms

embedded broadcast (tuple Full); memory fault suppression

Intrinsics

The C intrinsics of Clang 23.1.2 that compile to VPANDD, each with the form it compiles to and the Clang options it needs. The forms come from compiling every intrinsic and decoding the result with Intel XED; all intrinsics A–Z explains the method.

CPUID and processors

Each form belongs to an XED ISA set. A form can be used when the processor reports every CPUID bit of one of its ISA set's alternatives.

More AVX10.1 instructions

• VMULSS
• VORPD
• VORPS
• VPABSB
• VPABSD
• VPABSQ
• VPABSW
• VPACKSSDW
• VPACKSSWB
• VPACKUSDW
• VPACKUSWB
• VPADDB
• VPADDD
• VPADDQ
• VPADDSB
• VPADDSW
• VPADDUSB
• VPADDUSW
• VPADDW
• VPALIGNR
• VPANDND
• VPANDNQ
• VPANDQ
• VPAVGB
• VPAVGW
• VPBLENDMB
• VPBLENDMD
• VPBLENDMQ
• VPBLENDMW
• VPBROADCASTB
• VPBROADCASTD
• VPBROADCASTMB2Q
• VPBROADCASTMW2D
• VPBROADCASTQ
• VPBROADCASTW
• VPCLMULQDQ
• VPCMPB
• VPCMPD
• VPCMPEQB
• VPCMPEQD

All 686 AVX10.1 instructions