VPANDND

VPANDND is the EVEX form of VPANDN: it inverts its first source and ANDs the result with the second, over 128, 256 or 512 bits, with a write mask that selects doublewords and a memory operand that may be one doubleword repeated, {1to16} at 512 bits. The order is VPANDN’s: only the first source is inverted, and only the second may come from memory. VPANDNQ is the same with quadwords; without a mask or a broadcast the two give the same bits. VPANDD shows what the EVEX forms add in general.

Recorded on Zen 5#

• vpandnd zmm0{k3}, zmm31, zmm16 with AAEBh in the low 16 bits of K3 turned 00000001h and FFFFFFFFh into FFFFFFFEh in doubleword 0, and kept doublewords 2, 4, 8, 10, 12 and 14 of ZMM0.
• {evex} vpandnd xmm5, xmm5, xmm5 cleared all of ZMM5. AMD’s Zen 5 guide lists VPANDN with ZMM registers among the zeroing idioms (Section 2.9.2), a width only VPANDND and VPANDNQ encode; the guide does not name them.

In compiled code#

GCC 14 at -O2 with -march=x86-64-v4 compiles _mm512_andnot_epi32, _mm512_andnot_si512 and the masked _mm512_mask_andnot_epi32 to VPANDND, and folds a broadcast operand in: _mm512_andnot_epi32(a, _mm512_set1_epi32(*p)) is vpandnd zmm0, zmm0, dword ptr [rdi]{1to16}. In a loop, d[i] = b[i] & ~c[i] over int arrays, it uses no VPANDND but inverts c with VPTERNLOGD 55h and ANDs with VPANDD.

Clang 23 picks by encoding. With -mavx512f it compiles that loop to VPANDND with b from memory, and the masked intrinsic to VPANDND, but the unmasked ones to VPANDNQ, broadcasting *p into a register first. With -march=x86-64-v4 it uses VANDNPS for all of them, masked ones included, on YMM registers in the loop.

AMD’s Zen 5 latency spreadsheet gives the EVEX VPANDND one cycle and four per cycle on any of the four vector pipes, as VPANDN. Zen 5’s 6 recorded cases cover the register and memory forms, broadcast included, at all three widths.

Forms

Latency and throughput

Data flow

Where the elements of the sources go, element 0 on the right; results that depend on a control value are drawn for an example. How to read.

Operation

What the forms do, in pseudocode that our tests run against results recorded on real processors. How to read.

for i in range(VL // 32):
    if k1[i]:
        zmm1.d[i] = ~zmm2.d[i] & src3.d[i]
    elif zeroing:
        zmm1.d[i] = 0
    # else: zmm1.d[i] keeps its value
# m32bcst: src3.d[i] is the m32 for every i
# zmm1 is zeroed from bit VL up

Operands

Flags

None: XED records no flag that the forms test or change.

Exceptions

The exception class is XED's name for the set of exception conditions that a form follows. How to read.

All forms

AVX512-E4

Attributes

What else XED records about the forms. How to read.

All forms

write masking

Memory forms

embedded broadcast (tuple Full); memory fault suppression

Intrinsics

The C intrinsics of Clang 23.1.2 that compile to VPANDND, each with the form it compiles to and the Clang options it needs. The forms come from compiling every intrinsic and decoding the result with Intel XED; all intrinsics A–Z explains the method.

CPUID and processors

Each form belongs to an XED ISA set. A form can be used when the processor reports every CPUID bit of one of its ISA set's alternatives.

More AVX10.1 instructions

• VORPD
• VORPS
• VPABSB
• VPABSD
• VPABSQ
• VPABSW
• VPACKSSDW
• VPACKSSWB
• VPACKUSDW
• VPACKUSWB
• VPADDB
• VPADDD
• VPADDQ
• VPADDSB
• VPADDSW
• VPADDUSB
• VPADDUSW
• VPADDW
• VPALIGNR
• VPANDD
• VPANDNQ
• VPANDQ
• VPAVGB
• VPAVGW
• VPBLENDMB
• VPBLENDMD
• VPBLENDMQ
• VPBLENDMW
• VPBROADCASTB
• VPBROADCASTD
• VPBROADCASTMB2Q
• VPBROADCASTMW2D
• VPBROADCASTQ
• VPBROADCASTW
• VPCLMULQDQ
• VPCMPB
• VPCMPD
• VPCMPEQB
• VPCMPEQD
• VPCMPEQQ

All 686 AVX10.1 instructions