VPANDNQ

VPANDNQ is the EVEX form of VPANDN with a write mask that selects quadwords: NOT of the first source AND the second, over 128, 256 or 512 bits, with a memory operand that may be one quadword repeated, {1to8} at 512 bits. VPANDND is the same with doublewords and covers the zeroing idiom and how the compilers choose between the two names; unmasked they give the same bits.

Recorded on Zen 5#

• {evex} vpandnq xmm1, xmm2, xmm3 with 0 and 1 in the quadwords of XMM2 and 1 and 0 in those of XMM3 gave 1 and 0: only XMM2 was inverted.
• vpandnq zmm7{k6}, zmm12, qword bcst [mem] with a broadcast 0 wrote zeros only to quadwords 2, 5 and 7, the ones A4h selects, and left the other five of ZMM7 alone: a masked VPANDNQ against zero clears chosen elements.

In compiled code#

GCC 14 at -O2 with -march=x86-64-v4 compiles _mm512_andnot_epi64 and its masked forms to VPANDNQ, and also the AVX2 intrinsic _mm256_andnot_si256, as an EVEX vpandnq ymm0, ymm0, ymm1 where the VEX VPANDN would do; with -mavx512f, which lacks AVX512VL, it emits VPANDN there. When the inverted operand is the broadcast one, _mm512_andnot_epi64(_mm512_set1_epi64(*p), a), the memory operand cannot be the first source, and GCC emits vpternlogq zmm0, zmm0, qword ptr [rdi]{1to8}, 0x44 instead, while Clang 23 inverts the value with VPTERNLOGQ, broadcasts it and ANDs with VPANDQ.

Clang 23 with -mavx512f uses VPANDNQ for every unmasked AND-NOT intrinsic, whatever its element size, and for qd[i] = qb[i] & ~qc[i] over long long arrays; with -march=x86-64-v4 it uses VANDNPS, or VANDNPD under a quadword mask.

AMD’s Zen 5 latency spreadsheet gives VPANDNQ one cycle and four per cycle on any of the four vector pipes. Zen 5’s 6 recorded cases cover the register and memory forms, broadcast included, at all three widths.

Forms

Latency and throughput

Data flow

Where the elements of the sources go, element 0 on the right; results that depend on a control value are drawn for an example. How to read.

Operation

What the forms do, in pseudocode that our tests run against results recorded on real processors. How to read.

for i in range(VL // 64):
    if k1[i]:
        zmm1.q[i] = ~zmm2.q[i] & src3.q[i]
    elif zeroing:
        zmm1.q[i] = 0
    # else: zmm1.q[i] keeps its value
# m64bcst: src3.q[i] is the m64 for every i
# zmm1 is zeroed from bit VL up

Operands

Flags

None: XED records no flag that the forms test or change.

Exceptions

The exception class is XED's name for the set of exception conditions that a form follows. How to read.

All forms

AVX512-E4

Attributes

What else XED records about the forms. How to read.

All forms

write masking

Memory forms

embedded broadcast (tuple Full); memory fault suppression

Intrinsics

The C intrinsics of Clang 23.1.2 that compile to VPANDNQ, each with the form it compiles to and the Clang options it needs. The forms come from compiling every intrinsic and decoding the result with Intel XED; all intrinsics A–Z explains the method.

CPUID and processors

Each form belongs to an XED ISA set. A form can be used when the processor reports every CPUID bit of one of its ISA set's alternatives.

More AVX10.1 instructions

• VORPS
• VPABSB
• VPABSD
• VPABSQ
• VPABSW
• VPACKSSDW
• VPACKSSWB
• VPACKUSDW
• VPACKUSWB
• VPADDB
• VPADDD
• VPADDQ
• VPADDSB
• VPADDSW
• VPADDUSB
• VPADDUSW
• VPADDW
• VPALIGNR
• VPANDD
• VPANDND
• VPANDQ
• VPAVGB
• VPAVGW
• VPBLENDMB
• VPBLENDMD
• VPBLENDMQ
• VPBLENDMW
• VPBROADCASTB
• VPBROADCASTD
• VPBROADCASTMB2Q
• VPBROADCASTMW2D
• VPBROADCASTQ
• VPBROADCASTW
• VPCLMULQDQ
• VPCMPB
• VPCMPD
• VPCMPEQB
• VPCMPEQD
• VPCMPEQQ
• VPCMPEQW

All 686 AVX10.1 instructions