VPAVGB

VPAVGB averages unsigned bytes with halves rounded up, (a + b + 1) >> 1 worked out with a ninth bit: the VEX and EVEX form of PAVGB, whose page covers the rounding and the variations built on it. VEX.128 needs AVX and VEX.256 AVX2; the EVEX forms need AVX512BW (with AVX512VL below 512 bits) or AVX10.1 and add a write mask per byte, but no broadcast. Every form writes a separate destination, zeroes it above the vector length and reads memory at any alignment. On Zen 5, vpavgb xmm1, xmm2, xmm3 averaged 80h and 7Fh to 80h, 01h and FFh to 80h, and 00h and 01h to 01h, and vpavgb ymm4, ymm4, ymm4 left every byte as it was.

In compiled code#

In our builds at -O2 over fixed-size uint8_t arrays, a[i] = (b[i] + c[i] + 1) >> 1 is one VPAVGB per vector in GCC 14 and Clang 23, with -march=x86-64-v3 and -march=x86-64-v4, as is averaging two rows of an image, (img[2*y][i] + img[2*y+1][i] + 1) >> 1. Elsewhere they part:

• Signed bytes. For int8_t, Clang flips the top bit of both inputs with VPXOR, averages with VPAVGB and flips the result back, the trick PAVGB’s page describes. GCC widens to words with VPMOVSXBW, adds and shifts, and narrows again, with VPACKUSWB and VPERMQ at -v3 and with VPMOVWB at -v4.
• Four values. (b[2*i] + b[2*i+1] + c[2*i] + c[2*i+1] + 2) >> 2 uses no average at all: an average of two averages can come out one too high, so both compilers add in words.
• A condition. For if (c[i] & 1) a[i] = (a[i] + b[i] + 1) >> 1 at -v4, both average every byte and store under a byte mask with VMOVDQU8. Clang finds the mask without a compare: VPSLLW by 7 moves bit 0 of every byte to its top, which VPMOVB2M collects.

AMD’s latency spreadsheet for Zen 5 gives the VEX and EVEX rows alike two cycles, four per cycle on pipes FP0 to FP3.

Forms

Latency and throughput

Data flow

Where the elements of the sources go, element 0 on the right; results that depend on a control value are drawn for an example. How to read.

Operation

What the forms do, in pseudocode that our tests run against results recorded on real processors. How to read.

for i in range(VL // 8):
    if k1[i]:  # 1 without a write mask
        a = zmm2.b[i]
        b = src3.b[i]
        zmm1.b[i] = (a + b + 1) >> 1
    elif zeroing:
        zmm1.b[i] = 0
    # else: zmm1.b[i] keeps its value
# zmm1 is zeroed from bit VL up

Operands

Flags

None: XED records no flag that the forms test or change.

Exceptions

The exception class is XED's name for the set of exception conditions that a form follows. How to read.

VEX forms

avx-type-4

EVEX forms

AVX512-E4

Attributes

What else XED records about the forms. How to read.

EVEX forms

write masking

EVEX memory forms

memory fault suppression

Intrinsics

The C intrinsics of Clang 23.1.2 that compile to VPAVGB, each with the form it compiles to and the Clang options it needs. The forms come from compiling every intrinsic and decoding the result with Intel XED; all intrinsics A–Z explains the method.

CPUID and processors

Each form belongs to an XED ISA set. A form can be used when the processor reports every CPUID bit of one of its ISA set's alternatives.

More AVX instructions

• VORPD
• VORPS
• VPABSB
• VPABSD
• VPABSW
• VPACKSSDW
• VPACKSSWB
• VPACKUSDW
• VPACKUSWB
• VPADDB
• VPADDD
• VPADDQ
• VPADDSB
• VPADDSW
• VPADDUSB
• VPADDUSW
• VPADDW
• VPALIGNR
• VPAND
• VPANDN
• VPAVGW
• VPBLENDVB
• VPBLENDW
• VPCLMULQDQ
• VPCMPEQB
• VPCMPEQD
• VPCMPEQQ
• VPCMPEQW
• VPCMPESTRI
• VPCMPESTRM
• VPCMPGTB
• VPCMPGTD
• VPCMPGTQ
• VPCMPGTW
• VPCMPISTRI
• VPCMPISTRM
• VPERM2F128
• VPERMILPD
• VPERMILPS
• VPEXTRB

All 253 AVX instructions

More AVX2 instructions

• VMOVNTDQA
• VMPSADBW
• VPABSB
• VPABSD
• VPABSW
• VPACKSSDW
• VPACKSSWB
• VPACKUSDW
• VPACKUSWB
• VPADDB
• VPADDD
• VPADDQ
• VPADDSB
• VPADDSW
• VPADDUSB
• VPADDUSW
• VPADDW
• VPALIGNR
• VPAND
• VPANDN
• VPAVGW
• VPBLENDD
• VPBLENDVB
• VPBLENDW
• VPBROADCASTB
• VPBROADCASTD
• VPBROADCASTQ
• VPBROADCASTW
• VPCMPEQB
• VPCMPEQD
• VPCMPEQQ
• VPCMPEQW
• VPCMPGTB
• VPCMPGTD
• VPCMPGTQ
• VPCMPGTW
• VPERM2I128
• VPERMD
• VPERMPD
• VPERMPS

All 138 AVX2 instructions

More AVX10.1 instructions

• VPABSD
• VPABSQ
• VPABSW
• VPACKSSDW
• VPACKSSWB
• VPACKUSDW
• VPACKUSWB
• VPADDB
• VPADDD
• VPADDQ
• VPADDSB
• VPADDSW
• VPADDUSB
• VPADDUSW
• VPADDW
• VPALIGNR
• VPANDD
• VPANDND
• VPANDNQ
• VPANDQ
• VPAVGW
• VPBLENDMB
• VPBLENDMD
• VPBLENDMQ
• VPBLENDMW
• VPBROADCASTB
• VPBROADCASTD
• VPBROADCASTMB2Q
• VPBROADCASTMW2D
• VPBROADCASTQ
• VPBROADCASTW
• VPCLMULQDQ
• VPCMPB
• VPCMPD
• VPCMPEQB
• VPCMPEQD
• VPCMPEQQ
• VPCMPEQW
• VPCMPGTB
• VPCMPGTD

All 686 AVX10.1 instructions