VPBLENDMB

VPBLENDMB builds each byte of its destination from one of two sources, chosen by a mask register: the second source where the mask bit is set, the first where it is clear, or zero there with {z}. It is the byte form of VPBLENDMD, whose page sets it against masked moves and the older blends, and needs AVX512BW. One bit per byte makes the mask as wide as the vector has bytes, 16, 32 or 64 bits, so a ZMM blend reads the whole mask register (filled with KMOVQ). As for VPBLENDMW, there is no broadcast form.

Recorded on Zen 5#

• All 64 bits. In vpblendmb zmm0{k4}, zmm31, zmmword ptr [mem] K4 held 4E432F055A6A6DE5h: its low byte, E5h, took byte 0 from memory and byte 1 from ZMM31, and its high byte, 4Eh, took bytes 57 to 59 and 62 from memory.
• One register three times. vpblendmb zmm5{k6}, zmm5, zmm5 left ZMM5 as it was. With {z}, vpblendmb ymm5{k2}{z}, ymm5, ymm5 acted as a zero-masked move: it cleared the 12 bytes whose bits are clear in FCB6F2C9h, the low 32 bits of K2, and bits 256 and up.
• No mask copies the second source: {evex} vpblendmb ymm0, ymm31, ymmword ptr [mem] loaded memory.

In compiled code#

GCC 14 and Clang 23 at -O2 with -march=x86-64-v4 compile _mm512_mask_blend_epi8 as they do the word form: a masked VMOVDQU8 when the result may replace the first operand or the second is in memory, VPBLENDMB otherwise. For o[i] = a[i] > b[i] ? c[i] : 5 over uint8_t arrays, both compare with VPCMPUB, which Clang prints as VPCMPNLEUB, and blend a vector of fives with c[i] read from memory by VPBLENDMB. With -march=x86-64-v3 there is no unsigned byte compare: GCC builds a selector vector with VPSUBUSB and VPCMPEQB, Clang with VPMINUB and VPCMPEQB, and both blend with VPBLENDVB, which takes the top bit of each selector byte.

AMD’s Zen 5 latency spreadsheet gives VPBLENDMB one cycle and four per cycle on any of the four vector pipes, as VPBLENDMD. The 6 recorded cases cover the register and memory forms at all three widths.

Forms

Latency and throughput

Data flow

Where the elements of the sources go, element 0 on the right; results that depend on a control value are drawn for an example. How to read.

Operation

What the forms do, in pseudocode that our tests run against results recorded on real processors. How to read.

for i in range(VL // 8):
    if k1[i]:
        zmm1.b[i] = src3.b[i]
    elif zeroing:
        zmm1.b[i] = 0
    else:
        zmm1.b[i] = zmm2.b[i]
# zmm1 is zeroed from bit VL up

Operands

Flags

None: XED records no flag that the forms test or change.

Exceptions

The exception class is XED's name for the set of exception conditions that a form follows. How to read.

All forms

AVX512-E4

Attributes

What else XED records about the forms. How to read.

All forms

opmask selects the source

Memory forms

memory fault suppression

CPUID and processors

Each form belongs to an XED ISA set. A form can be used when the processor reports every CPUID bit of one of its ISA set's alternatives.

More AVX10.1 instructions

• VPABSW
• VPACKSSDW
• VPACKSSWB
• VPACKUSDW
• VPACKUSWB
• VPADDB
• VPADDD
• VPADDQ
• VPADDSB
• VPADDSW
• VPADDUSB
• VPADDUSW
• VPADDW
• VPALIGNR
• VPANDD
• VPANDND
• VPANDNQ
• VPANDQ
• VPAVGB
• VPAVGW
• VPBLENDMD
• VPBLENDMQ
• VPBLENDMW
• VPBROADCASTB
• VPBROADCASTD
• VPBROADCASTMB2Q
• VPBROADCASTMW2D
• VPBROADCASTQ
• VPBROADCASTW
• VPCLMULQDQ
• VPCMPB
• VPCMPD
• VPCMPEQB
• VPCMPEQD
• VPCMPEQQ
• VPCMPEQW
• VPCMPGTB
• VPCMPGTD
• VPCMPGTQ
• VPCMPGTW

All 686 AVX10.1 instructions