VPBROADCASTQ

VPBROADCASTQ fills every quadword of a vector with one 64-bit value: the low quadword of an XMM register, eight bytes of memory, or, in the EVEX forms, a 64-bit general-purpose register. VPBROADCASTD describes the family and how the sources differ by encoding. With a write mask, only the selected elements get the value: on Zen 5, vpbroadcastq zmm14{k4}, rdx wrote RDX into quadwords 0, 2, 5, 6 and 7, the set bits of the low byte of K4 (E5h), and kept the other three, while vpbroadcastq ymm7{k3}{z}, r14 zeroed the elements its mask left out.

In compiled code#

GCC 14 and Clang 23 at -O2 compile _mm256_set1_epi64x(x), and a loop adding a 64-bit k to every element of an array, to VMOVQ and VPBROADCASTQ with -march=x86-64-v3, and to VPBROADCASTQ straight from the register with -march=x86-64-v4. For 128 bits under AVX2, _mm_set1_epi64x(x) is VMOVQ and VPBROADCASTQ in Clang, while GCC unpacks the register with itself by VPUNPCKLQDQ.

From memory, GCC uses VPBROADCASTQ and Clang prints VBROADCASTSD, which copies the same 64 bits. A 64-bit constant, as in _mm256_add_epi64(a, _mm256_set1_epi64x(0x0123456789abcdef)), shows the two styles of the family: GCC builds it with MOVABS and broadcasts it from the register, and Clang broadcasts eight bytes from memory with VPBROADCASTQ, or, with AVX-512, folds them into the VPADDQ as an embedded {1to4} operand. A constant whose halves are equal, such as 00FF00FF00FF00FFh, needs only a doubleword: GCC broadcasts it with VPBROADCASTD.

A double in a register, _mm256_set1_pd(x), is spread by VBROADCASTSD from the XMM register in both compilers, the register form that AVX2 added beside VPBROADCASTQ.

AMD’s latency spreadsheet for Zen 5 lists the 128-bit VEX form with a register or memory source as one macro-op with a latency of one cycle on all four vector pipes, the 256-bit VEX form and the EVEX forms on two of them, and the forms with a general-purpose source as two macro-ops. VPBROADCASTMB2Q copies a mask register into every quadword instead.

In the optimization guide

What the optimization guide says about VPBROADCASTQ, a line per claim. Each links to the claim in the guide, with its sources and where they differ.

Skylake to Cooper Lake

• AVX-512 and frequency on the servers: A broadcast of a 32-bit or 64-bit element from memory runs on the load ports, sparing port 5; a 16-bit one still goes through port 5, so it gains nothing from the memory form.

Forms

Latency and throughput

Data flow

Where the elements of the sources go, element 0 on the right; results that depend on a control value are drawn for an example. How to read.

Operation

What the forms do, in pseudocode that our tests run against results recorded on real processors. How to read.

for i in range(VL // 64):
    if k1[i]:  # 1 without a write mask
        zmm1.q[i] = src2.q[0]
    elif zeroing:
        zmm1.q[i] = 0
    # else: zmm1.q[i] keeps its value
# zmm1 is zeroed from bit VL up

Operands

Flags

None: XED records no flag that the forms test or change.

Exceptions

The exception class is XED's name for the set of exception conditions that a form follows. How to read.

VEX forms

avx-type-6

Forms only in 64-bit mode

AVX512-E7NM

Other forms

AVX512-E6

Attributes

What else XED records about the forms. How to read.

EVEX forms

write masking

EVEX memory forms

memory fault suppression

Intrinsics

The C intrinsics of Clang 23.1.2 that compile to VPBROADCASTQ, each with the form it compiles to and the Clang options it needs. The forms come from compiling every intrinsic and decoding the result with Intel XED; all intrinsics A–Z explains the method.

CPUID and processors

Each form belongs to an XED ISA set. A form can be used when the processor reports every CPUID bit of one of its ISA set's alternatives.

More AVX2 instructions

• VPACKUSDW
• VPACKUSWB
• VPADDB
• VPADDD
• VPADDQ
• VPADDSB
• VPADDSW
• VPADDUSB
• VPADDUSW
• VPADDW
• VPALIGNR
• VPAND
• VPANDN
• VPAVGB
• VPAVGW
• VPBLENDD
• VPBLENDVB
• VPBLENDW
• VPBROADCASTB
• VPBROADCASTD
• VPBROADCASTW
• VPCMPEQB
• VPCMPEQD
• VPCMPEQQ
• VPCMPEQW
• VPCMPGTB
• VPCMPGTD
• VPCMPGTQ
• VPCMPGTW
• VPERM2I128
• VPERMD
• VPERMPD
• VPERMPS
• VPERMQ
• VPGATHERDD
• VPGATHERDQ
• VPGATHERQD
• VPGATHERQQ
• VPHADDD
• VPHADDSW

All 138 AVX2 instructions

More AVX10.1 instructions

• VPADDSB
• VPADDSW
• VPADDUSB
• VPADDUSW
• VPADDW
• VPALIGNR
• VPANDD
• VPANDND
• VPANDNQ
• VPANDQ
• VPAVGB
• VPAVGW
• VPBLENDMB
• VPBLENDMD
• VPBLENDMQ
• VPBLENDMW
• VPBROADCASTB
• VPBROADCASTD
• VPBROADCASTMB2Q
• VPBROADCASTMW2D
• VPBROADCASTW
• VPCLMULQDQ
• VPCMPB
• VPCMPD
• VPCMPEQB
• VPCMPEQD
• VPCMPEQQ
• VPCMPEQW
• VPCMPGTB
• VPCMPGTD
• VPCMPGTQ
• VPCMPGTW
• VPCMPQ
• VPCMPUB
• VPCMPUD
• VPCMPUQ
• VPCMPUW
• VPCMPW
• VPCOMPRESSB
• VPCOMPRESSD

All 686 AVX10.1 instructions