VPCMPEQW

VPCMPEQW compares words for equality: the VEX form writes FFFFh or 0000h per word into a vector, as SSE2’s PCMPEQW does, whose page covers the search through 16-bit text, and the EVEX form one bit per word into a mask register, as VPCMPEQD’s page describes. VEX.128 needs AVX and VEX.256 AVX2; the EVEX forms need AVX512BW (with AVX512VL below 512 bits) or AVX10.1 and take a write mask, but no broadcast. On Zen 5, {evex} vpcmpeqw k2, ymm24, ymm3 set K2 to 9461h, clearing the 48 bits above the sixteen results, and in vpcmpeqw k4{k1}, xmm17, xmmword ptr [mem] words 0 and 3 were equal but K1 selected neither, so K4 became 0.

Selecting and counting words#

In our builds at -O2 over fixed-size int16_t arrays, b[i] == c[i] ? -1 : 0 is one VPCMPEQW per vector in GCC 14 and Clang 23 with -march=x86-64-v3, and b[i] == c[i] ? 0 : b[i] adds a VPANDN. With -march=x86-64-v4, GCC compares zmm registers into K1 and expands the mask with a zero-masked VMOVDQU16, while Clang keeps the VEX form; for the second loop, both test for inequality with VPCMPNEQW, an alias of VPCMPW, and clear the equal words with VMOVDQU16.

Counting, n += b[i] == k, cannot subtract each -1 from a word counter, which would wrap. GCC keeps 1 per match, with a VPAND at -v3 or a zero-masked VMOVDQU16 at -v4, and widens to doublewords with VPMOVZXWD before adding. Clang at -v4 compares eight words at a time into K0 to K3, expands each mask into doublewords of -1 with VPMOVM2D and subtracts those.

AMD’s latency spreadsheet for Zen 5 gives the VEX row one cycle, four per cycle, and the EVEX rows, which write a mask, 3, 4 and 6 cycles for xmm, ymm and zmm sources, two per cycle. Its guide lists VPCMPEQW with one register twice among the ones idioms, which need no input (Section 2.9.2); vpcmpeqw ymm4, ymm4, ymm4 gave all ones on Zen 5, but for _mm256_set1_epi16(-1) both compilers emit VPCMPEQD, which sets the same bits.

Forms

Latency and throughput

Data flow

Where the elements of the sources go, element 0 on the right; results that depend on a control value are drawn for an example. How to read.

Operation

What the forms do, in pseudocode that our tests run against results recorded on real processors. How to read.

for i in range(VL // 16):
    a = ymm2.w[i]
    b = src3.w[i]
    ymm1.w[i] = -1 if a == b else 0
# ymm1 is zeroed from bit VL up

for i in range(VL // 16):
    k1[i] = k2[i] and zmm2.w[i] == src3.w[i]
# the other bits of k1 are cleared

Operands

Flags

None: XED records no flag that the forms test or change.

Exceptions

The exception class is XED's name for the set of exception conditions that a form follows. How to read.

VEX forms

avx-type-4

EVEX forms

AVX512-E4

Attributes

What else XED records about the forms. How to read.

EVEX forms

write masking

EVEX memory forms

memory fault suppression

Intrinsics

The C intrinsics of Clang 23.1.2 that compile to VPCMPEQW, each with the form it compiles to and the Clang options it needs. The forms come from compiling every intrinsic and decoding the result with Intel XED; all intrinsics A–Z explains the method.

CPUID and processors

Each form belongs to an XED ISA set. A form can be used when the processor reports every CPUID bit of one of its ISA set's alternatives.

More AVX instructions

• VPACKUSWB
• VPADDB
• VPADDD
• VPADDQ
• VPADDSB
• VPADDSW
• VPADDUSB
• VPADDUSW
• VPADDW
• VPALIGNR
• VPAND
• VPANDN
• VPAVGB
• VPAVGW
• VPBLENDVB
• VPBLENDW
• VPCLMULQDQ
• VPCMPEQB
• VPCMPEQD
• VPCMPEQQ
• VPCMPESTRI
• VPCMPESTRM
• VPCMPGTB
• VPCMPGTD
• VPCMPGTQ
• VPCMPGTW
• VPCMPISTRI
• VPCMPISTRM
• VPERM2F128
• VPERMILPD
• VPERMILPS
• VPEXTRB
• VPEXTRD
• VPEXTRQ
• VPEXTRW
• VPHADDD
• VPHADDSW
• VPHADDW
• VPHMINPOSUW
• VPHSUBD

All 253 AVX instructions

More AVX2 instructions

• VPADDSB
• VPADDSW
• VPADDUSB
• VPADDUSW
• VPADDW
• VPALIGNR
• VPAND
• VPANDN
• VPAVGB
• VPAVGW
• VPBLENDD
• VPBLENDVB
• VPBLENDW
• VPBROADCASTB
• VPBROADCASTD
• VPBROADCASTQ
• VPBROADCASTW
• VPCMPEQB
• VPCMPEQD
• VPCMPEQQ
• VPCMPGTB
• VPCMPGTD
• VPCMPGTQ
• VPCMPGTW
• VPERM2I128
• VPERMD
• VPERMPD
• VPERMPS
• VPERMQ
• VPGATHERDD
• VPGATHERDQ
• VPGATHERQD
• VPGATHERQQ
• VPHADDD
• VPHADDSW
• VPHADDW
• VPHSUBD
• VPHSUBSW
• VPHSUBW
• VPMADDUBSW

All 138 AVX2 instructions

More AVX10.1 instructions

• VPANDNQ
• VPANDQ
• VPAVGB
• VPAVGW
• VPBLENDMB
• VPBLENDMD
• VPBLENDMQ
• VPBLENDMW
• VPBROADCASTB
• VPBROADCASTD
• VPBROADCASTMB2Q
• VPBROADCASTMW2D
• VPBROADCASTQ
• VPBROADCASTW
• VPCLMULQDQ
• VPCMPB
• VPCMPD
• VPCMPEQB
• VPCMPEQD
• VPCMPEQQ
• VPCMPGTB
• VPCMPGTD
• VPCMPGTQ
• VPCMPGTW
• VPCMPQ
• VPCMPUB
• VPCMPUD
• VPCMPUQ
• VPCMPUW
• VPCMPW
• VPCOMPRESSB
• VPCOMPRESSD
• VPCOMPRESSQ
• VPCOMPRESSW
• VPCONFLICTD
• VPCONFLICTQ
• VPDPBUSD
• VPDPBUSDS
• VPDPWSSD
• VPDPWSSDS

All 686 AVX10.1 instructions