VPCMPUQ

VPCMPUQ compares 2, 4 or 8 pairs of quadwords as unsigned integers and writes one bit per pair to a mask register. VPCMPQ is its signed twin and shows what AVX2 code does instead, flipping the sign bits of both operands before a signed VPCMPGTQ; VPCMPD explains the predicates of the immediate and the write mask, which clears bits rather than merging them. Like the other compares of AVX-512F, it takes a broadcast quadword as its second source.

Where the sign bit counts#

The signed and unsigned compares disagree whenever exactly one operand has its top bit set. On Zen 5, vpcmpuq k3{k5}, zmm0, zmm31, 0x5, greater or equal, set the bit of the pair 8000000000000000h and 1, which a signed compare would order the other way, and left clear the pairs that put 8000000000000000h and 7FFFFFFFFFFFFFFFh against FFFFFFFFFFFFFFFFh, the largest unsigned quadword. With 1 against 1 also passing, the result was 21h: the bits of elements 0 and 5, of the four that K5 selected.

Ranges in one compare#

Unsigned order turns lo <= x && x <= hi into a single test, x - lo <= hi - lo, since every x below lo wraps around to a large number; VPCMPUB does the same with letters. For d[i] = a[i] - lo <= hi - lo ? a[i] : 0 over 1024 uint64_t elements, GCC 14 and Clang 23 at -O2 with -march=x86-64-v4 emit a VPSUBQ and one VPCMPUQ with predicate 2, less or equal (Clang prints it vpcmpleuq), and a zero-masked VMOVDQA64. A bounds check works the same way: (uint64_t)x[i] < (uint64_t)n rejects negative indices as well as those past the end, in one VPCMPUQ with predicate 1. The compilers do not make that rewrite for x[i] >= 0 && x[i] < n themselves, since n could be negative: both emit two signed compares there, the second under the first one’s mask.

AMD’s latency spreadsheet for Zen 5 lists VPCMPUQ as it lists VPCMPQ: one macro-op, two for a memory source, with a latency of 3, 4 and 6 cycles for XMM, YMM and ZMM.

In the optimization guide

What the optimization guide says about VPCMPUQ, a line per claim. Each links to the claim in the guide, with its sources and where they differ.

Zen 4

• Vectors and floating point: An AVX-512 compare that writes a mask register, such as VPCMPD, takes 3, 4 or 5 cycles for 128, 256 or 512 bits, where the older compares into a vector register take one cycle for integers and two for floats. sources differ

Forms

Latency and throughput

Data flow

Where the elements of the sources go, element 0 on the right; results that depend on a control value are drawn for an example. How to read.

Operation

What the forms do, in pseudocode that our tests run against results recorded on real processors. How to read.

for i in range(VL // 64):
    a = zmm2.q[i]
    b = src3.q[i]
    k1[i] = k2[i] and compare(imm8, a, b)
# imm8 & 7: 0 ==, 1 <, 2 <=, 3 false, 4 !=, 5 >=, 6 >, 7 true
# m64bcst: src3.q[i] is the m64 for every i
# the other bits of k1 are cleared

Operands

Flags

None: XED records no flag that the forms test or change.

Exceptions

The exception class is XED's name for the set of exception conditions that a form follows. How to read.

All forms

AVX512-E4

Attributes

What else XED records about the forms. How to read.

All forms

write masking

Memory forms

embedded broadcast (tuple Full); memory fault suppression

Intrinsics

The C intrinsics of Clang 23.1.2 that compile to VPCMPUQ, each with the form it compiles to and the Clang options it needs. The forms come from compiling every intrinsic and decoding the result with Intel XED; all intrinsics A–Z explains the method.

CPUID and processors

Each form belongs to an XED ISA set. A form can be used when the processor reports every CPUID bit of one of its ISA set's alternatives.

More AVX10.1 instructions

• VPBROADCASTB
• VPBROADCASTD
• VPBROADCASTMB2Q
• VPBROADCASTMW2D
• VPBROADCASTQ
• VPBROADCASTW
• VPCLMULQDQ
• VPCMPB
• VPCMPD
• VPCMPEQB
• VPCMPEQD
• VPCMPEQQ
• VPCMPEQW
• VPCMPGTB
• VPCMPGTD
• VPCMPGTQ
• VPCMPGTW
• VPCMPQ
• VPCMPUB
• VPCMPUD
• VPCMPUW
• VPCMPW
• VPCOMPRESSB
• VPCOMPRESSD
• VPCOMPRESSQ
• VPCOMPRESSW
• VPCONFLICTD
• VPCONFLICTQ
• VPDPBUSD
• VPDPBUSDS
• VPDPWSSD
• VPDPWSSDS
• VPERMB
• VPERMD
• VPERMI2B
• VPERMI2D
• VPERMI2PD
• VPERMI2PS
• VPERMI2Q
• VPERMI2W

All 686 AVX10.1 instructions