VPERMB

VPERMB builds each byte of its result by picking a byte of a table: the index byte in the same position of the first source says which byte of the second source to take. It came with AVX512_VBMI and is the first byte permute of x86 that reaches across the whole register, 16, 32 or 64 bytes, where PSHUFB and its VEX and EVEX forms pick only within each 128-bit lane.

How the index is read#

Only the low bits of an index count: 4 in the xmm form, 5 in ymm, 6 in zmm. The bits above are ignored, bit 7 included, so no index gives a zero byte as PSHUFB’s bit 7 does; a zero comes from the write mask with {z} instead. In a case recorded on Zen 5 with the xmm form, the index bytes C0h and A0h both took byte 0 of the table, and 57h and C7h both byte 7. The operand order differs from PSHUFB’s too: the indices are the first source and the table is the one that may be in memory, as in VPERMD and the intrinsic _mm512_permutexvar_epi8(idx, table).

Where it appears#

With -mavx512vbmi, or a processor that has it such as -march=znver5 or -march=icelake-server, GCC 14 and Clang 23 at -O2 compile a constant shuffle that reverses the 64 bytes of a vector to one VPERMB with the indices loaded from memory. -march=x86-64-v4 does not include VBMI, and there the same shuffle takes two or more instructions of AVX512BW: Clang reverses within lanes with VPSHUFB and swaps the lanes with VSHUFI64X2, and GCC uses VPERMW, two VPSHUFBs and an OR.

Neither compiler turns a table lookup loop such as out[i] = table[in[i] & 63] into VPERMB. Intel’s optimization guide writes it by hand, with the 64-byte table held in a register and one VPERMB per 64 input bytes, and reports it 6.5 times as fast as an AVX512BW version that widens the bytes to words (Section 17.17.1, Example 17-26). The same chapter pairs VPERMB with VPMULTISHIFTQB to unpack 5-bit fields. A table of 128 bytes needs VPERMI2B or VPERMT2B, which index two registers with 7 bits.

AMD’s Zen 5 guide lists VPERMB as one macro-op with a latency of 2, 4 and 5 cycles for the xmm, ymm and zmm forms.

In the optimization guide

What the optimization guide says about VPERMB, a line per claim. Each links to the claim in the guide, with its sources and where they differ.

Vectors

• Shuffles and lane crossing: AVX-512’s two-source permutes and VBMI’s VPERMB take any element of their sources, each in one macro-op on Zen 5.

Forms

Latency and throughput

Data flow

Where the elements of the sources go, element 0 on the right; results that depend on a control value are drawn for an example. How to read.

Operation

What the forms do, in pseudocode that our tests run against results recorded on real processors. How to read.

n = VL // 8  # 16 in xmm, 32 in ymm, 64 in zmm
for i in range(n):
    if k1[i]:
        zmm1.b[i] = src3.b[zmm2.b[i] % n]
    elif zeroing:
        zmm1.b[i] = 0
    # else: zmm1.b[i] keeps its value
# zmm1 is zeroed from bit VL up

Operands

Flags

None: XED records no flag that the forms test or change.

Exceptions

The exception class is XED's name for the set of exception conditions that a form follows. How to read.

All forms

AVX512-E4NF

Attributes

What else XED records about the forms. How to read.

All forms

write masking

Intrinsics

The C intrinsics of Clang 23.1.2 that compile to VPERMB, each with the form it compiles to and the Clang options it needs. The forms come from compiling every intrinsic and decoding the result with Intel XED; all intrinsics A–Z explains the method.

CPUID and processors

Each form belongs to an XED ISA set. A form can be used when the processor reports every CPUID bit of one of its ISA set's alternatives.

More AVX10.1 instructions

• VPCMPGTB
• VPCMPGTD
• VPCMPGTQ
• VPCMPGTW
• VPCMPQ
• VPCMPUB
• VPCMPUD
• VPCMPUQ
• VPCMPUW
• VPCMPW
• VPCOMPRESSB
• VPCOMPRESSD
• VPCOMPRESSQ
• VPCOMPRESSW
• VPCONFLICTD
• VPCONFLICTQ
• VPDPBUSD
• VPDPBUSDS
• VPDPWSSD
• VPDPWSSDS
• VPERMD
• VPERMI2B
• VPERMI2D
• VPERMI2PD
• VPERMI2PS
• VPERMI2Q
• VPERMI2W
• VPERMILPD
• VPERMILPS
• VPERMPD
• VPERMPS
• VPERMQ
• VPERMT2B
• VPERMT2D
• VPERMT2PD
• VPERMT2PS
• VPERMT2Q
• VPERMT2W
• VPERMW
• VPEXPANDB

All 686 AVX10.1 instructions