VPERMI2D

VPERMI2D looks up doublewords in a table of two registers. The destination starts out holding the indices; the two sources are the table, the first source its low half and the second its high half. For each element, the low bits of the index choose an element and the next bit chooses the register: with 16 doublewords per ZMM register, bits 3:0 choose the element and bit 4 the source, so the indices 0 to 31 cover all 32 doublewords of the two. Higher bits are ignored. In XMM and YMM registers the table holds 8 or 16 elements and the index bits shrink to match.

The results overwrite the indices, which is the I in the name. VPERMT2D computes the same selection with the indices in a source and the result over the first table instead (T for table). The intrinsic _mm512_permutex2var_epi32(a, idx, b) stands for both, and the compiler picks whichever overwrites a register it no longer needs: GCC 14 and Clang 23 at -O2 with -mavx512f compile it to VPERMI2D when only the index is free and to VPERMT2D when the first table is. The two differ where a merge mask leaves elements alone: there VPERMI2D keeps the index and VPERMT2D the first table’s element. So the merge-masked intrinsics are two: _mm512_mask2_permutex2var_epi32, with the mask after idx, falls back to the index and is VPERMI2D, and _mm512_mask_permutex2var_epi32, with the mask after a, falls back to a and is VPERMT2D.

Uses#

• Splitting interleaved data. Two index vectors of the even and the odd positions, 0, 2, 4 … 30 and 1, 3, 5 … 31, separate the real and imaginary parts of 16 complex numbers loaded in two registers. Intel’s optimization manual does this with VPERMI2D and VPERMT2D in place of a gather (Section 17.22.1, Example 17-31); both compilers vectorize such a loop with VPERMT2D, and Clang with VPERMI2D where the index register is no longer needed.
• Small tables. A table of 32 entries fits in two registers, so a lookup that would otherwise be a gather is one instruction; Intel’s manual reports large gains in exp, log and pow from such lookups (Section 17.15.7).

VPERMI2Q, VPERMI2PS and VPERMI2W do the same for other elements, and VPERMI2B for bytes, with AVX512_VBMI. For one register of table, VPERMD is enough.

In the optimization guide

What the optimization guide says about VPERMI2D, a line per claim. Each links to the claim in the guide, with its sources and where they differ.

Vectors

• Shuffles and lane crossing: AVX-512’s two-source permutes and VBMI’s VPERMB take any element of their sources, each in one macro-op on Zen 5.

Forms

Latency and throughput

Data flow

Where the elements of the sources go, element 0 on the right; results that depend on a control value are drawn for an example. How to read.

Operation

What the forms do, in pseudocode that our tests run against results recorded on real processors. How to read.

n = VL // 32           # 4 in xmm, 8 in ymm, 16 in zmm
for i in range(n):
    if k1[i]:
        x = zmm1.d[i]  # the index, in zmm1
        if x & n:
            zmm1.d[i] = src3.d[x % n]
        else:
            zmm1.d[i] = zmm2.d[x % n]
    elif zeroing:
        zmm1.d[i] = 0
    # else: zmm1.d[i] keeps its value
# m32bcst: src3.d[i] is the m32 for every i
# zmm1 is zeroed from bit VL up

Operands

Flags

None: XED records no flag that the forms test or change.

Exceptions

The exception class is XED's name for the set of exception conditions that a form follows. How to read.

All forms

AVX512-E4NF

Attributes

What else XED records about the forms. How to read.

All forms

write masking

Memory forms

embedded broadcast (tuple Full)

Intrinsics

The C intrinsics of Clang 23.1.2 that compile to VPERMI2D, each with the form it compiles to and the Clang options it needs. The forms come from compiling every intrinsic and decoding the result with Intel XED; all intrinsics A–Z explains the method.

CPUID and processors

Each form belongs to an XED ISA set. A form can be used when the processor reports every CPUID bit of one of its ISA set's alternatives.

More AVX10.1 instructions

• VPCMPGTW
• VPCMPQ
• VPCMPUB
• VPCMPUD
• VPCMPUQ
• VPCMPUW
• VPCMPW
• VPCOMPRESSB
• VPCOMPRESSD
• VPCOMPRESSQ
• VPCOMPRESSW
• VPCONFLICTD
• VPCONFLICTQ
• VPDPBUSD
• VPDPBUSDS
• VPDPWSSD
• VPDPWSSDS
• VPERMB
• VPERMD
• VPERMI2B
• VPERMI2PD
• VPERMI2PS
• VPERMI2Q
• VPERMI2W
• VPERMILPD
• VPERMILPS
• VPERMPD
• VPERMPS
• VPERMQ
• VPERMT2B
• VPERMT2D
• VPERMT2PD
• VPERMT2PS
• VPERMT2Q
• VPERMT2W
• VPERMW
• VPEXPANDB
• VPEXPANDD
• VPEXPANDQ
• VPEXPANDW

All 686 AVX10.1 instructions