VPMAXUQ

VPMAXUQ keeps the larger of each pair of quadwords, compared as unsigned integers: 2, 4 or 8 at a time, in EVEX encodings only, from AVX512F on. It is the partner of VPMINUQ, whose page shows what AVX2 code does instead, a sign flip, a signed compare and a blend, and the absolute difference that Clang builds from both. VPMAXUD is the doubleword form and VPMAXSQ the signed one.

Recorded on Zen 5#

• The top bit. vpmaxuq zmm9{k7}, zmm9, zmm14 chose FFFFFFFFFFFFFFFFh over 1 and over 7FFFFFFFFFFFFFFFh, and against a broadcast 1, vpmaxuq xmm1{k7}{z}, xmm2, [mem] kept 8000000000000000h twice, where a signed maximum gives 1.
• A broadcast. Against a broadcast FFFFFFFFFFFFFFFFh, every element selected by K3 became all ones; the two left out kept their old bits.
• Zeroing. vpmaxuq ymm24{k3}{z}, ymm3, ymm3 returned the elements that K3 selects, 7FFFFFFFFFFFFFFFh, 8000000000000000h and 1, and 0 for the one it leaves out.

In compiled code#

At -O2 with -march=x86-64-v4, GCC 14 and Clang 23 compile `a[i] > b[i]

? a[i] : b[i]overuint64_tand a clamp from below,a[i] < 100 ? 100

a[i], to VPMAXUQ with memory as the second source. For the largest element of an array, GCC keeps one ZMM maximum in the loop and halves it at the end with [VEXTRACTI64X4](/insn/vextracti64x4/) and [VEXTRACTI64X2](/insn/vextracti64x2/); Clang keeps four YMM maximums. A saturating subtraction, a[i] > b[i] ? a[i] - b[i] : 0, is max(a, b) - bin Clang, VPMAXUQ and [VPSUBQ](/insn/vpsubq/), while GCC compares with [VPCMPUQ](/insn/vpcmpuq/) and subtracts under a zero mask._mm512_max_epu64` is one VPMAXUQ.

AMD’s Zen 5 latency spreadsheet gives one macro-op on pipe FP0 or FP3 and 2 cycles, as for VPMINUQ.

Forms

Latency and throughput

Data flow

Where the elements of the sources go, element 0 on the right; results that depend on a control value are drawn for an example. How to read.

Operation

What the forms do, in pseudocode that our tests run against results recorded on real processors. How to read.

for i in range(VL // 64):
    if k1[i]:
        a = zmm2.q[i]
        b = src3.q[i]
        zmm1.q[i] = max(a, b)
    elif zeroing:
        zmm1.q[i] = 0
    # else: zmm1.q[i] keeps its value
# m64bcst: src3.q[i] is the m64 for every i
# zmm1 is zeroed from bit VL up

Operands

Flags

None: XED records no flag that the forms test or change.

Exceptions

The exception class is XED's name for the set of exception conditions that a form follows. How to read.

All forms

AVX512-E4

Attributes

What else XED records about the forms. How to read.

All forms

write masking

Memory forms

embedded broadcast (tuple Full); memory fault suppression

Intrinsics

The C intrinsics of Clang 23.1.2 that compile to VPMAXUQ, each with the form it compiles to and the Clang options it needs. The forms come from compiling every intrinsic and decoding the result with Intel XED; all intrinsics A–Z explains the method.

CPUID and processors

Each form belongs to an XED ISA set. A form can be used when the processor reports every CPUID bit of one of its ISA set's alternatives.

More AVX10.1 instructions

• VPGATHERDD
• VPGATHERDQ
• VPGATHERQD
• VPGATHERQQ
• VPINSRB
• VPINSRD
• VPINSRQ
• VPINSRW
• VPLZCNTD
• VPLZCNTQ
• VPMADD52HUQ
• VPMADD52LUQ
• VPMADDUBSW
• VPMADDWD
• VPMAXSB
• VPMAXSD
• VPMAXSQ
• VPMAXSW
• VPMAXUB
• VPMAXUD
• VPMAXUW
• VPMINSB
• VPMINSD
• VPMINSQ
• VPMINSW
• VPMINUB
• VPMINUD
• VPMINUQ
• VPMINUW
• VPMOVB2M
• VPMOVD2M
• VPMOVDB
• VPMOVDW
• VPMOVM2B
• VPMOVM2D
• VPMOVM2Q
• VPMOVM2W
• VPMOVQ2M
• VPMOVQB
• VPMOVQD

All 686 AVX10.1 instructions