VPMINSQ

VPMINSQ keeps the smaller of each pair of quadwords, compared as signed integers. It is AVX-512F’s minimum for int64_t, in EVEX encodings only, with masking and a broadcast operand. VPMAXSQ describes the family: the AVX2 sequence of VPCMPGTQ and a blend that it replaces, and the Zen 5 latency it shares with the other quadword minimums and maximums; VPMINUQ is the unsigned form and VPMINSD the doubleword one. In the cases recorded on Zen 5:

• vpminsq xmm1, xmm2, xmm3 kept 8000000000000000h, the most negative quadword, against FFFFFFFFFFFFFFFFh, and chose -1 over 7FFFFFFFFFFFFFFFh, then zeroed the register from bit 128 up;
• against a broadcast -1 under the mask E3h, elements 0, 1, 6 and 7 became -1, element 5 kept 8000000000000000h, and elements 2 to 4 were left as they were;
• vpminsq ymm5{k2}{z}, ymm5, ymm5, the minimum of a register with itself, acted as a zeroing masked move: the low four bits of K2, 1001b, kept elements 0 and 3 and cleared elements 1 and 2.

In compiled code#

With -march=x86-64-v4, GCC 14 and Clang 23 at -O2 differ in how far they take it. Clang vectorizes r[i] = a[i] < b[i] ? a[i] : b[i] over int64_t with four VPMINSQs on YMM registers per iteration, the second operand read from memory, and does the same for the minimum of an array, starting from a broadcast INT64_MAX and halving to one element at the end. GCC keeps both loops scalar at -O2, yet still uses the instruction: each element is loaded with VMOVQ into an XMM register and taken through vpminsq xmm0, xmm0, xmm1 in place of a compare and a CMOV. A clamp, x < lo ? lo : x followed by x > hi ? hi : x, becomes VPMAXSQ with lo and VPMINSQ with hi, against broadcast bounds in Clang and one element at a time in GCC.

The intrinsics are _mm512_min_epi64 and its masked and narrower forms; _mm_min_epi64 needs AVX512VL, and neither compiler accepts it for -march=x86-64-v3.

Forms

Latency and throughput

Data flow

Where the elements of the sources go, element 0 on the right; results that depend on a control value are drawn for an example. How to read.

Operation

What the forms do, in pseudocode that our tests run against results recorded on real processors. How to read.

for i in range(VL // 64):
    if k1[i]:
        sa = zmm2.sq[i]
        sb = src3.sq[i]
        zmm1.q[i] = min(sa, sb)
    elif zeroing:
        zmm1.q[i] = 0
    # else: zmm1.q[i] keeps its value
# m64bcst: src3.q[i] is the m64 for every i
# zmm1 is zeroed from bit VL up

Operands

Flags

None: XED records no flag that the forms test or change.

Exceptions

The exception class is XED's name for the set of exception conditions that a form follows. How to read.

All forms

AVX512-E4

Attributes

What else XED records about the forms. How to read.

All forms

write masking

Memory forms

embedded broadcast (tuple Full); memory fault suppression

Intrinsics

The C intrinsics of Clang 23.1.2 that compile to VPMINSQ, each with the form it compiles to and the Clang options it needs. The forms come from compiling every intrinsic and decoding the result with Intel XED; all intrinsics A–Z explains the method.

CPUID and processors

Each form belongs to an XED ISA set. A form can be used when the processor reports every CPUID bit of one of its ISA set's alternatives.

More AVX10.1 instructions

• VPINSRB
• VPINSRD
• VPINSRQ
• VPINSRW
• VPLZCNTD
• VPLZCNTQ
• VPMADD52HUQ
• VPMADD52LUQ
• VPMADDUBSW
• VPMADDWD
• VPMAXSB
• VPMAXSD
• VPMAXSQ
• VPMAXSW
• VPMAXUB
• VPMAXUD
• VPMAXUQ
• VPMAXUW
• VPMINSB
• VPMINSD
• VPMINSW
• VPMINUB
• VPMINUD
• VPMINUQ
• VPMINUW
• VPMOVB2M
• VPMOVD2M
• VPMOVDB
• VPMOVDW
• VPMOVM2B
• VPMOVM2D
• VPMOVM2Q
• VPMOVM2W
• VPMOVQ2M
• VPMOVQB
• VPMOVQD
• VPMOVQW
• VPMOVSDB
• VPMOVSDW
• VPMOVSQB

All 686 AVX10.1 instructions