VPMINUQ

VPMINUQ keeps the smaller of each pair of quadwords, compared as unsigned integers. VPMINUD describes the doubleword form and its uses as an unsigned compare and in saturating arithmetic; this is AVX-512F’s quadword version, in EVEX encodings only, with masking, a broadcast operand and the 512-bit width. SSE and AVX2 have no minimum or maximum of quadwords, signed or unsigned. On Zen 5, vpminuq zmm9{k4}, zmm9, zmm14 chose 7FFFFFFFFFFFFFFFh over 8000000000000000h, which the signed VPMINSQ would keep, and against a broadcast 1 the elements 8000000000000000h and FFFFFFFFFFFFFFFFh both became 1.

Before and after AVX-512#

With -march=x86-64-v3, GCC 14 and Clang 23 at -O2 compile a[i] < b[i] ? a[i] : b[i] over uint64_t to a compare and a blend: both operands get their sign bits flipped (GCC subtracts 8000000000000000h, Clang XORs it) before a signed VPCMPGTQ, and VPBLENDVB or VBLENDVPD picks the result: four instructions per vector. With -march=x86-64-v4 it is one VPMINUQ, and the minimum of a whole array takes it in the loop and on halves at the end.

The absolute difference of unsigned numbers, a > b ? a - b : b - a, shows the compilers’ two styles: Clang computes the larger minus the smaller with VPMINUQ, VPMAXUQ and VPSUBQ, while GCC compares with VPCMPUQ and subtracts the other way round under the mask. For a saturating add, s < a[i] ? UINT64_MAX : s, Clang computes min(a, ~b) + b with VPMINUQ, and GCC compares and blends with VPBLENDMQ. Narrowing uint64_t to uint32_t with a clamp at FFFFFFFFh is VPMINUQ and a VPERMT2D in GCC, while Clang stores with VPMOVUSQD, which saturates by itself.

AMD’s latency spreadsheet for Zen 5 gives this one, like the other quadword minimums and maximums, a latency of 2 cycles on two pipes, FP0 and FP3, where VPMINUD takes one cycle on any of the four.

Forms

Latency and throughput

Data flow

Where the elements of the sources go, element 0 on the right; results that depend on a control value are drawn for an example. How to read.

Operation

What the forms do, in pseudocode that our tests run against results recorded on real processors. How to read.

for i in range(VL // 64):
    if k1[i]:
        a = zmm2.q[i]
        b = src3.q[i]
        zmm1.q[i] = min(a, b)
    elif zeroing:
        zmm1.q[i] = 0
    # else: zmm1.q[i] keeps its value
# m64bcst: src3.q[i] is the m64 for every i
# zmm1 is zeroed from bit VL up

Operands

Flags

None: XED records no flag that the forms test or change.

Exceptions

The exception class is XED's name for the set of exception conditions that a form follows. How to read.

All forms

AVX512-E4

Attributes

What else XED records about the forms. How to read.

All forms

write masking

Memory forms

embedded broadcast (tuple Full); memory fault suppression

Intrinsics

The C intrinsics of Clang 23.1.2 that compile to VPMINUQ, each with the form it compiles to and the Clang options it needs. The forms come from compiling every intrinsic and decoding the result with Intel XED; all intrinsics A–Z explains the method.

CPUID and processors

Each form belongs to an XED ISA set. A form can be used when the processor reports every CPUID bit of one of its ISA set's alternatives.

More AVX10.1 instructions

• VPLZCNTD
• VPLZCNTQ
• VPMADD52HUQ
• VPMADD52LUQ
• VPMADDUBSW
• VPMADDWD
• VPMAXSB
• VPMAXSD
• VPMAXSQ
• VPMAXSW
• VPMAXUB
• VPMAXUD
• VPMAXUQ
• VPMAXUW
• VPMINSB
• VPMINSD
• VPMINSQ
• VPMINSW
• VPMINUB
• VPMINUD
• VPMINUW
• VPMOVB2M
• VPMOVD2M
• VPMOVDB
• VPMOVDW
• VPMOVM2B
• VPMOVM2D
• VPMOVM2Q
• VPMOVM2W
• VPMOVQ2M
• VPMOVQB
• VPMOVQD
• VPMOVQW
• VPMOVSDB
• VPMOVSDW
• VPMOVSQB
• VPMOVSQD
• VPMOVSQW
• VPMOVSWB
• VPMOVSXBD

All 686 AVX10.1 instructions