VPOPCNTB

VPOPCNTB counts the set bits of each byte of a vector and writes each count, 0 to 8, to the byte in the same place. It belongs to AVX512_BITALG with VPOPCNTW, which counts words, and VPSHUFBITQMB; the doubleword and quadword counts VPOPCNTD and VPOPCNTQ are a separate extension, AVX512_VPOPCNTDQ. Neither is part of x86-64-v4. AMD’s Zen 5 guide lists AVX512_BITALG among Zen 5’s extensions.

The byte count by hand#

Without BITALG, byte counts are the classic table lookup: a register holds the counts of the 16 nibble values, VPSHUFB looks up the low nibble of every byte and, after a shift, the high one, and VPADDB adds the two. VPOPCNTB is that whole sequence, and its result is the same, so code written for the table can switch without a change in its later steps.

For a loop that stores __builtin_popcount(a[i]) for 1,024 bytes, Clang 23 at -O2 with -march=x86-64-v4 emits exactly that table sequence, and GCC 14 keeps the scalar POPCNT, one byte at a time. With -mavx512bitalg, or a -march that has BITALG such as icelake-server, znver4 or znver5, both emit VPOPCNTB.

Wider counts from byte counts#

The byte counts are often a step toward wider ones. VPSADBW against a zero register sums each group of eight bytes into a quadword, which gives the count of every 64-bit element on processors with BITALG but not VPOPCNTDQ; where both exist, VPOPCNTQ does it in one instruction. Keeping the byte counts themselves is useful when the position matters, as in rank and select over bitmaps: the counts per byte, added up as a prefix sum, say how many set bits come before each byte.

The memory forms suppress faults on the bytes that the write mask leaves out, so a masked VPOPCNTB with {z} can read the partial last vector of a buffer straight from memory, without a separate load.

AMD’s Zen 5 guide lists VPOPCNTB as one macro-op with a latency of 2 cycles, the same as VPOPCNTD.

Forms

Latency and throughput

Data flow

Where the elements of the sources go, element 0 on the right; results that depend on a control value are drawn for an example. How to read.

Operation

What the forms do, in pseudocode that our tests run against results recorded on real processors. How to read.

for i in range(VL // 8):
    if k1[i]:
        zmm1.b[i] = popcount(src2.b[i])
    elif zeroing:
        zmm1.b[i] = 0
    # else: zmm1.b[i] keeps its value
# zmm1 is zeroed from bit VL up

Operands

Flags

None: XED records no flag that the forms test or change.

Exceptions

The exception class is XED's name for the set of exception conditions that a form follows. How to read.

All forms

AVX512-E4

Attributes

What else XED records about the forms. How to read.

All forms

write masking

Memory forms

memory fault suppression

Intrinsics

The C intrinsics of Clang 23.1.2 that compile to VPOPCNTB, each with the form it compiles to and the Clang options it needs. The forms come from compiling every intrinsic and decoding the result with Intel XED; all intrinsics A–Z explains the method.

CPUID and processors

Each form belongs to an XED ISA set. A form can be used when the processor reports every CPUID bit of one of its ISA set's alternatives.

More AVX10.1 instructions

• VPMOVUSQD
• VPMOVUSQW
• VPMOVUSWB
• VPMOVW2M
• VPMOVWB
• VPMOVZXBD
• VPMOVZXBQ
• VPMOVZXBW
• VPMOVZXDQ
• VPMOVZXWD
• VPMOVZXWQ
• VPMULDQ
• VPMULHRSW
• VPMULHUW
• VPMULHW
• VPMULLD
• VPMULLQ
• VPMULLW
• VPMULTISHIFTQB
• VPMULUDQ
• VPOPCNTD
• VPOPCNTQ
• VPOPCNTW
• VPORD
• VPORQ
• VPROLD
• VPROLQ
• VPROLVD
• VPROLVQ
• VPRORD
• VPRORQ
• VPRORVD
• VPRORVQ
• VPSADBW
• VPSCATTERDD
• VPSCATTERDQ
• VPSCATTERQD
• VPSCATTERQQ
• VPSHLDD
• VPSHLDQ

All 686 AVX10.1 instructions