VPOPCNTD

VPOPCNTD counts the set bits of each doubleword, as POPCNT does for one register. It belongs to AVX512_VPOPCNTDQ with VPOPCNTQ, which counts quadwords; the byte and word counts, VPOPCNTB and VPOPCNTW, came separately in AVX512_BITALG. Neither extension is part of x86-64-v4, so a compiler needs -mavx512vpopcntdq or a -march naming a processor that has it. AMD’s Zen 5 guide lists AVX512_VPOPCNTDQ among Zen 5’s extensions.

What it replaces#

Without it, vector code counts bits with a table of the 16 nibble counts in a register: VPSHUFB looks up the low and the high nibble of every byte, an addition gives per-byte counts, and VPSADBW against zero sums bytes into larger elements. For a vector of eight __builtin_popcount results, Clang 23 at -O2 with -march=x86-64-v4 emits that sequence, 14 instructions in all, and with -mavx512vpopcntdq a single VPOPCNTD; GCC 14 emits VPOPCNTD too once allowed. Clang also vectorizes a loop of __builtin_popcount into VPOPCNTD, where GCC keeps the scalar POPCNT.

Uses#

• Per-element counts: the number of set flags in each of many bitmaps, or the Hamming distance of pairs of 32-bit codes after a VPXORD.
• The weight of a whole buffer, summed into a vector of counts that is reduced once at the end. For that, VPOPCNTQ halves the number of elements to add up.
• Masks are not its job: the bits of a mask register are counted with KMOVW and the scalar POPCNT.

AMD’s Zen 5 guide lists VPOPCNTD as one macro-op with a latency of 2 cycles on XMM, YMM and ZMM registers alike.

Forms

Latency and throughput

Data flow

Where the elements of the sources go, element 0 on the right; results that depend on a control value are drawn for an example. How to read.

Operation

What the forms do, in pseudocode that our tests run against results recorded on real processors. How to read.

for i in range(VL // 32):
    if k1[i]:
        zmm1.d[i] = popcount(src2.d[i])
    elif zeroing:
        zmm1.d[i] = 0
    # else: zmm1.d[i] keeps its value
# m32bcst: src2.d[i] is the m32 for every i
# zmm1 is zeroed from bit VL up

Operands

Flags

None: XED records no flag that the forms test or change.

Exceptions

The exception class is XED's name for the set of exception conditions that a form follows. How to read.

All forms

AVX512-E4

Attributes

What else XED records about the forms. How to read.

All forms

write masking

Memory forms

embedded broadcast (tuple Full); memory fault suppression

Intrinsics

The C intrinsics of Clang 23.1.2 that compile to VPOPCNTD, each with the form it compiles to and the Clang options it needs. The forms come from compiling every intrinsic and decoding the result with Intel XED; all intrinsics A–Z explains the method.

CPUID and processors

Each form belongs to an XED ISA set. A form can be used when the processor reports every CPUID bit of one of its ISA set's alternatives.

More AVX10.1 instructions

• VPMOVUSQW
• VPMOVUSWB
• VPMOVW2M
• VPMOVWB
• VPMOVZXBD
• VPMOVZXBQ
• VPMOVZXBW
• VPMOVZXDQ
• VPMOVZXWD
• VPMOVZXWQ
• VPMULDQ
• VPMULHRSW
• VPMULHUW
• VPMULHW
• VPMULLD
• VPMULLQ
• VPMULLW
• VPMULTISHIFTQB
• VPMULUDQ
• VPOPCNTB
• VPOPCNTQ
• VPOPCNTW
• VPORD
• VPORQ
• VPROLD
• VPROLQ
• VPROLVD
• VPROLVQ
• VPRORD
• VPRORQ
• VPRORVD
• VPRORVQ
• VPSADBW
• VPSCATTERDD
• VPSCATTERDQ
• VPSCATTERQD
• VPSCATTERQQ
• VPSHLDD
• VPSHLDQ
• VPSHLDVD

All 686 AVX10.1 instructions