VPOPCNTQ

VPOPCNTQ counts the set bits of each quadword and writes the count, 0 to 64, to the same element, as POPCNT does for one register. It is the quadword form of VPOPCNTD, whose page describes AVX512_VPOPCNTDQ, the nibble-table code it replaces and the flags a compiler needs, since x86-64-v4 does not include it. It takes masking and a broadcast quadword.

Recorded on Zen 5#

• The extremes. All ones counted 40h, 7FFFFFFFFFFFFFFFh 3Fh and 8000000000000000h 1, also as a broadcast: vpopcntq zmm24{k6}, qword bcst [mem] wrote 1 to the three elements K6’s low byte, A4h, selected and kept the other five.
• Zeroing. vpopcntq ymm0{k7}{z}, ymm31, with E3h in K7’s low byte, wrote the counts of elements 0 and 1, 0 and 1, and zeroed elements 2 and 3.

Counting quadwords without it#

For o[i] = __builtin_popcountll(a[i]) over uint64_t arrays, GCC 14 and Clang 23 at -O2 with -march=znver5 load and count 8 quadwords with one vpopcntq zmm0, zmmword ptr [...]; summing all the counts, GCC adds the vectors with VPADDQ and reduces at the end. With -march=x86-64-v4, GCC keeps a scalar POPCNT per element, and Clang counts the nibbles of each byte with VPSHUFB and adds the eight bytes of each quadword with VPSADBW against zero, which leaves one count per quadword: seven instructions per vector where VPOPCNTQ needs one.

AMD’s Zen 5 latency spreadsheet gives VPOPCNTQ 2 cycles and two per cycle on pipes FP0 and FP3, as VPOPCNTD.

Forms

Latency and throughput

Data flow

Where the elements of the sources go, element 0 on the right; results that depend on a control value are drawn for an example. How to read.

Operation

What the forms do, in pseudocode that our tests run against results recorded on real processors. How to read.

for i in range(VL // 64):
    if k1[i]:
        zmm1.q[i] = popcount(src2.q[i])
    elif zeroing:
        zmm1.q[i] = 0
    # else: zmm1.q[i] keeps its value
# m64bcst: src2.q[i] is the m64 for every i
# zmm1 is zeroed from bit VL up

Operands

Flags

None: XED records no flag that the forms test or change.

Exceptions

The exception class is XED's name for the set of exception conditions that a form follows. How to read.

All forms

AVX512-E4

Attributes

What else XED records about the forms. How to read.

All forms

write masking

Memory forms

embedded broadcast (tuple Full); memory fault suppression

Intrinsics

The C intrinsics of Clang 23.1.2 that compile to VPOPCNTQ, each with the form it compiles to and the Clang options it needs. The forms come from compiling every intrinsic and decoding the result with Intel XED; all intrinsics A–Z explains the method.

CPUID and processors

Each form belongs to an XED ISA set. A form can be used when the processor reports every CPUID bit of one of its ISA set's alternatives.

More AVX10.1 instructions

• VPMOVUSWB
• VPMOVW2M
• VPMOVWB
• VPMOVZXBD
• VPMOVZXBQ
• VPMOVZXBW
• VPMOVZXDQ
• VPMOVZXWD
• VPMOVZXWQ
• VPMULDQ
• VPMULHRSW
• VPMULHUW
• VPMULHW
• VPMULLD
• VPMULLQ
• VPMULLW
• VPMULTISHIFTQB
• VPMULUDQ
• VPOPCNTB
• VPOPCNTD
• VPOPCNTW
• VPORD
• VPORQ
• VPROLD
• VPROLQ
• VPROLVD
• VPROLVQ
• VPRORD
• VPRORQ
• VPRORVD
• VPRORVQ
• VPSADBW
• VPSCATTERDD
• VPSCATTERDQ
• VPSCATTERQD
• VPSCATTERQQ
• VPSHLDD
• VPSHLDQ
• VPSHLDVD
• VPSHLDVQ

All 686 AVX10.1 instructions