VPROLVQ

VPROLVQ rotates each quadword of its first source left by the count in the matching quadword of the second source. It is the variable form of VPROLQ, whose page covers the rotate and the shifts it replaces; VPRORVQ rotates right, and VPSLLVQ is the shift with per-element counts. Only the low 6 bits of each count matter, so a count of 64 leaves the element as it is, where VPSLLVQ would give zero. It needs AVX512F, plus AVX512VL below 512 bits, and takes masking and a broadcast quadword as the count.

Recorded on Zen 5#

• Counts modulo 64. In vprolvq zmm5{k4}, zmm5, zmm5, where each element is rotated by itself, 40h came back unchanged, 7Fh, a count of 63, became 800000000000003Fh, a rotate right by one, 20h became 2000000000h and 3 became 18h.
• Merging. In the same case, the elements that K4 does not select kept their values.
• A broadcast count of 0 returned the first source in the elements selected by the mask.

In compiled code#

At -O2 with -march=x86-64-v4, Clang 23 compiles (x[i] << s) | (x[i] >> ((64 - s) & 63)) with s = c[i] & 63 over uint64_t arrays to VPROLVQ on YMM registers, taking the counts c[i] from memory and dropping the AND, since the instruction already reduces them; with one count s for the whole loop it broadcasts it and still uses VPROLVQ. GCC 14 keeps VPSLLVQ, VPSRLVQ and an OR on ZMM registers. Both compile _mm512_rolv_epi64 to one VPROLVQ.

AMD’s Zen 5 latency spreadsheet gives VPROLVQ the numbers of VPROLQ: 2 cycles, two per cycle on pipes FP0 and FP1.

Forms

Latency and throughput

Data flow

Where the elements of the sources go, element 0 on the right; results that depend on a control value are drawn for an example. How to read.

Operation

What the forms do, in pseudocode that our tests run against results recorded on real processors. How to read.

for i in range(VL // 64):
    if k1[i]:
        a = zmm2.q[i]
        b = src3.q[i]
        zmm1.q[i] = rol(a, b, 64)
    elif zeroing:
        zmm1.q[i] = 0
    # else: zmm1.q[i] keeps its value
# m64bcst: src3.q[i] is the m64 for every i
# zmm1 is zeroed from bit VL up

Operands

Flags

None: XED records no flag that the forms test or change.

Exceptions

The exception class is XED's name for the set of exception conditions that a form follows. How to read.

All forms

AVX512-E4

Attributes

What else XED records about the forms. How to read.

All forms

write masking

Memory forms

embedded broadcast (tuple Full); memory fault suppression

Intrinsics

The C intrinsics of Clang 23.1.2 that compile to VPROLVQ, each with the form it compiles to and the Clang options it needs. The forms come from compiling every intrinsic and decoding the result with Intel XED; all intrinsics A–Z explains the method.

CPUID and processors

Each form belongs to an XED ISA set. A form can be used when the processor reports every CPUID bit of one of its ISA set's alternatives.

More AVX10.1 instructions

• VPMOVZXWD
• VPMOVZXWQ
• VPMULDQ
• VPMULHRSW
• VPMULHUW
• VPMULHW
• VPMULLD
• VPMULLQ
• VPMULLW
• VPMULTISHIFTQB
• VPMULUDQ
• VPOPCNTB
• VPOPCNTD
• VPOPCNTQ
• VPOPCNTW
• VPORD
• VPORQ
• VPROLD
• VPROLQ
• VPROLVD
• VPRORD
• VPRORQ
• VPRORVD
• VPRORVQ
• VPSADBW
• VPSCATTERDD
• VPSCATTERDQ
• VPSCATTERQD
• VPSCATTERQQ
• VPSHLDD
• VPSHLDQ
• VPSHLDVD
• VPSHLDVQ
• VPSHLDVW
• VPSHLDW
• VPSHRDD
• VPSHRDQ
• VPSHRDVD
• VPSHRDVQ
• VPSHRDVW

All 686 AVX10.1 instructions