VPRORD

VPRORD rotates each doubleword right by the count in its immediate, of which only the low 5 bits count: the bits that leave at the bottom come back in at the top. A rotate right by n is a rotate left by 32 - n, so it does nothing VPROLD cannot do with another immediate, and that page covers the uses; VPRORQ rotates quadwords, and VPRORVD takes a count per element from a register. It is AVX-512F’s, with masking and a broadcast source.

Recorded on Zen 5#

• One bit. vprord xmm14, xmm8, 0x1 turned 00000001h into 80000000h and 7FFFFFFFh into BFFFFFFFh.
• Counts taken modulo 32. 20h rotated by nothing: in vprord zmm17{k3}, zmm30, 0x20 every selected element came out as it went in. 1Fh and 3Fh both rotated by 31, a rotate left by one: the broadcast 1 became 2, and 7FFFFFFFh became FFFFFFFEh.
• A half turn. The broadcast 7FFFFFFFh rotated by 10h gave FFFF7FFFh, its two words swapped.

Not from compilers#

GCC 14 and Clang 23 at -O2 with -march=x86-64-v4 turn every rotate by a constant into VPROLD: (x >> 7) | (x << 25) over uint32_t arrays and the intrinsic _mm512_ror_epi32(a, 7) alike become vprold ..., 25, and _mm256_ror_epi32(a, 8) becomes vprold ymm0, ymm0, 24. VPRORD therefore appears where assembly is written by hand, as in code that follows a specification stated with right rotations, such as the SHA-256 functions of FIPS 180-4. For a count in a variable Clang emits VPRORVD with the count broadcast, and GCC two shifts and VPORD.

AMD’s Zen 5 latency spreadsheet gives VPRORD 2 cycles of latency and two per cycle on pipes FP0 and FP1, as VPROLD.

Forms

Latency and throughput

Data flow

Where the elements of the sources go, element 0 on the right; results that depend on a control value are drawn for an example. How to read.

Operation

What the forms do, in pseudocode that our tests run against results recorded on real processors. How to read.

for i in range(VL // 32):
    if k1[i]:
        zmm1.d[i] = ror(src2.d[i], imm8, 32)
    elif zeroing:
        zmm1.d[i] = 0
    # else: zmm1.d[i] keeps its value
# m32bcst: src2.d[i] is the m32 for every i
# zmm1 is zeroed from bit VL up

Operands

Flags

None: XED records no flag that the forms test or change.

Exceptions

The exception class is XED's name for the set of exception conditions that a form follows. How to read.

All forms

AVX512-E4

Attributes

What else XED records about the forms. How to read.

All forms

write masking

Memory forms

embedded broadcast (tuple Full); memory fault suppression

CPUID and processors

Each form belongs to an XED ISA set. A form can be used when the processor reports every CPUID bit of one of its ISA set's alternatives.

More AVX10.1 instructions

• VPMOVZXWQ
• VPMULDQ
• VPMULHRSW
• VPMULHUW
• VPMULHW
• VPMULLD
• VPMULLQ
• VPMULLW
• VPMULTISHIFTQB
• VPMULUDQ
• VPOPCNTB
• VPOPCNTD
• VPOPCNTQ
• VPOPCNTW
• VPORD
• VPORQ
• VPROLD
• VPROLQ
• VPROLVD
• VPROLVQ
• VPRORQ
• VPRORVD
• VPRORVQ
• VPSADBW
• VPSCATTERDD
• VPSCATTERDQ
• VPSCATTERQD
• VPSCATTERQQ
• VPSHLDD
• VPSHLDQ
• VPSHLDVD
• VPSHLDVQ
• VPSHLDVW
• VPSHLDW
• VPSHRDD
• VPSHRDQ
• VPSHRDVD
• VPSHRDVQ
• VPSHRDVW
• VPSHRDW

All 686 AVX10.1 instructions