VPRORQ

VPRORQ rotates each quadword right by the count in its immediate, of which only the low 6 bits count. A rotate right by n is a rotate left by 64 - n, so it does nothing that VPROLQ cannot do with another immediate, and that page covers the uses. Its doubleword form is VPRORD, and VPRORVQ takes a count per element from a register.

Recorded on Zen 5#

• {evex} vprorq xmm17, xmm30, 0x20 swapped the two doublewords of each quadword: 0Fh became F00000000h.
• 7Fh and FFh both act as 63, a rotate left by one: vprorq ymm5{k7}{z}, ymm5, 0x7f turned 7FFFFFFFFFFFFFFFh into FFFFFFFFFFFFFFFEh, and vprorq ymm24{k6}, [mem], 0xff did the same to the element K6 selects.
• A count of 0 copies the source: vprorq zmm24{k4}, zmm3, 0 wrote the elements of ZMM3 unchanged where K4 selects them.

Compilers prefer VPROLQ#

GCC 14 and Clang 23 at -O2 with -march=x86-64-v4 turn rotates right into VPROLQ. Over a uint64_t array, (x >> 7) | (x << 57) becomes VPROLQ by 57, and the intrinsics _mm512_ror_epi64, _mm256_ror_epi64 and the merging and zeroing _mm512_mask_ror_epi64 and _mm512_maskz_ror_epi64 with 13 become VPROLQ by 51. GCC emits VPRORQ only when the count does not fit, passing _mm512_ror_epi64(x, 64) to the assembler as vprorq zmm0, zmm0, 64; Clang returns the source unchanged for 64, with no instruction, and reduces 70 to a VPROLQ by 58. With a count per element, _mm512_rorv_epi64 is VPRORVQ in both.

AMD’s Zen 5 latency spreadsheet gives VPRORQ what it gives VPROLQ: 2 cycles and two per cycle on pipes FP0 and FP1. Zen 5’s 6 recorded cases cover the register, memory and broadcast forms at all three widths.

Forms

Latency and throughput

Data flow

Where the elements of the sources go, element 0 on the right; results that depend on a control value are drawn for an example. How to read.

Operation

What the forms do, in pseudocode that our tests run against results recorded on real processors. How to read.

for i in range(VL // 64):
    if k1[i]:
        zmm1.q[i] = ror(src2.q[i], imm8, 64)
    elif zeroing:
        zmm1.q[i] = 0
    # else: zmm1.q[i] keeps its value
# m64bcst: src2.q[i] is the m64 for every i
# zmm1 is zeroed from bit VL up

Operands

Flags

None: XED records no flag that the forms test or change.

Exceptions

The exception class is XED's name for the set of exception conditions that a form follows. How to read.

All forms

AVX512-E4

Attributes

What else XED records about the forms. How to read.

All forms

write masking

Memory forms

embedded broadcast (tuple Full); memory fault suppression

CPUID and processors

Each form belongs to an XED ISA set. A form can be used when the processor reports every CPUID bit of one of its ISA set's alternatives.

More AVX10.1 instructions

• VPMULDQ
• VPMULHRSW
• VPMULHUW
• VPMULHW
• VPMULLD
• VPMULLQ
• VPMULLW
• VPMULTISHIFTQB
• VPMULUDQ
• VPOPCNTB
• VPOPCNTD
• VPOPCNTQ
• VPOPCNTW
• VPORD
• VPORQ
• VPROLD
• VPROLQ
• VPROLVD
• VPROLVQ
• VPRORD
• VPRORVD
• VPRORVQ
• VPSADBW
• VPSCATTERDD
• VPSCATTERDQ
• VPSCATTERQD
• VPSCATTERQQ
• VPSHLDD
• VPSHLDQ
• VPSHLDVD
• VPSHLDVQ
• VPSHLDVW
• VPSHLDW
• VPSHRDD
• VPSHRDQ
• VPSHRDVD
• VPSHRDVQ
• VPSHRDVW
• VPSHRDW
• VPSHUFB

All 686 AVX10.1 instructions