Instruction
VPRORVD
Rotates each doubleword right by the count in the matching element of the second source.
- Extensions
- Forms
- 6 (6 EVEX)
- Data
- Intel XED v2026.08.23
Forms
| Instruction | Encoding | Requires |
|---|---|---|
VPRORVD zmm {k}{z}, zmm, zmm
VPRORVD_ZMMu32_MASKmskw_ZMMu32_ZMMu32_AVX512 | EVEX.512.66.0F38.W0 14 /r | AVX10.1 or AVX512F |
VPRORVD zmm {k}{z}, zmm, m512/m32bcst
VPRORVD_ZMMu32_MASKmskw_ZMMu32_MEMu32_AVX512 | EVEX.512.66.0F38.W0 14 /r | AVX10.1 or AVX512F |
VPRORVD xmm {k}{z}, xmm, xmm
VPRORVD_XMMu32_MASKmskw_XMMu32_XMMu32_AVX512 | EVEX.128.66.0F38.W0 14 /r | AVX10.1 or AVX512F + AVX512VL |
VPRORVD xmm {k}{z}, xmm, m128/m32bcst
VPRORVD_XMMu32_MASKmskw_XMMu32_MEMu32_AVX512 | EVEX.128.66.0F38.W0 14 /r | AVX10.1 or AVX512F + AVX512VL |
VPRORVD ymm {k}{z}, ymm, ymm
VPRORVD_YMMu32_MASKmskw_YMMu32_YMMu32_AVX512 | EVEX.256.66.0F38.W0 14 /r | AVX10.1 or AVX512F + AVX512VL |
VPRORVD ymm {k}{z}, ymm, m256/m32bcst
VPRORVD_YMMu32_MASKmskw_YMMu32_MEMu32_AVX512 | EVEX.256.66.0F38.W0 14 /r | AVX10.1 or AVX512F + AVX512VL |
Intrinsics
The C intrinsics of Clang 23.1.2 that compile to VPRORVD, each with the form it compiles to and the Clang options it needs. The forms come from compiling every intrinsic and decoding the result with Intel XED; all intrinsics A–Z explains the method.
| Intrinsic | Compiles to |
|---|---|
_mm_rorv_epi32
__m128i _mm_rorv_epi32(__m128i __A, __m128i __B) |
|
_mm_mask_rorv_epi32
__m128i _mm_mask_rorv_epi32(__m128i __W, __mmask8 __U, __m128i __A, __m128i __B) |
|
_mm_maskz_rorv_epi32
__m128i _mm_maskz_rorv_epi32(__mmask8 __U, __m128i __A, __m128i __B) |
|
_mm256_rorv_epi32
__m256i _mm256_rorv_epi32(__m256i __A, __m256i __B) |
|
_mm256_mask_rorv_epi32
__m256i _mm256_mask_rorv_epi32(__m256i __W, __mmask8 __U, __m256i __A, __m256i __B) |
|
_mm256_maskz_rorv_epi32
__m256i _mm256_maskz_rorv_epi32(__mmask8 __U, __m256i __A, __m256i __B) |
|
_mm512_rorv_epi32
__m512i _mm512_rorv_epi32(__m512i __A, __m512i __B) |
|
_mm512_mask_rorv_epi32
__m512i _mm512_mask_rorv_epi32(__m512i __W, __mmask16 __U, __m512i __A, __m512i __B) |
|
_mm512_maskz_rorv_epi32
__m512i _mm512_maskz_rorv_epi32(__mmask16 __U, __m512i __A, __m512i __B) |
|
CPUID and processors
Each form belongs to an XED ISA set. A form can be used when the processor reports every CPUID bit of one of its ISA set's alternatives.
| ISA set | CPUID | Processors in XED |
|---|---|---|
AVX512F_512 | AVX10.1 or AVX512F | Cannon Lake, Ice Lake (client), Tiger Lake, Nova Lake, Skylake-SP, Cascade Lake, Cooper Lake, Ice Lake (server), Sapphire Rapids, Emerald Rapids, Granite Rapids, Diamond Rapids, Knights Landing, Knights Mill |
AVX512F_128 | AVX10.1 or AVX512F + AVX512VL | Cannon Lake, Ice Lake (client), Tiger Lake, Nova Lake, Skylake-SP, Cascade Lake, Cooper Lake, Ice Lake (server), Sapphire Rapids, Emerald Rapids, Granite Rapids, Diamond Rapids |
AVX512F_256 | AVX10.1 or AVX512F + AVX512VL | Cannon Lake, Ice Lake (client), Tiger Lake, Nova Lake, Skylake-SP, Cascade Lake, Cooper Lake, Ice Lake (server), Sapphire Rapids, Emerald Rapids, Granite Rapids, Diamond Rapids |
More AVX10.1 instructions
- VPMULHRSW
- VPMULHUW
- VPMULHW
- VPMULLD
- VPMULLQ
- VPMULLW
- VPMULTISHIFTQB
- VPMULUDQ
- VPOPCNTB
- VPOPCNTD
- VPOPCNTQ
- VPOPCNTW
- VPORD
- VPORQ
- VPROLD
- VPROLQ
- VPROLVD
- VPROLVQ
- VPRORD
- VPRORQ
- VPRORVQ
- VPSADBW
- VPSCATTERDD
- VPSCATTERDQ
- VPSCATTERQD
- VPSCATTERQQ
- VPSHLDD
- VPSHLDQ
- VPSHLDVD
- VPSHLDVQ
- VPSHLDVW
- VPSHLDW
- VPSHRDD
- VPSHRDQ
- VPSHRDVD
- VPSHRDVQ
- VPSHRDVW
- VPSHRDW
- VPSHUFB
- VPSHUFBITQMB
Sources
- Intel XED v2026.08.23 (commit
0bcb6237345c): forms, encodings, ISA sets, CPUID bits and chip model. - Clang's x86 intrinsic headers, LLVM 23.1.2 (commit
85ac56026243): the intrinsics, their signatures and doc comments, and the Clang of that release, which compiled each of them. - Intel Advanced Vector Extensions 10.2 Architecture Specification, revision 6.0 (361050-006, January 2026)
The tables are derived from Intel XED, Copyright Intel Corporation, licensed under the Apache License 2.0; x86-64.net converted and reformatted them. The intrinsics and their signatures come from Clang, part of the LLVM Project, licensed under the Apache License 2.0 with LLVM Exceptions. The text is our own.