VSCALEFBF16

VSCALEFBF16 multiplies each bfloat16 value of its first source by 2 raised to the floor of the matching value of the second, a × 2^floor(b), 8, 16 or 32 per register. It is VSCALEFPS for bfloat16, and undoes the split that VGETEXPBF16 and VGETMANTBF16 make. It belongs to AVX10.2; the opcode is 2Ch in EVEX map 6 with no prefix and W0, where VSCALEFPH has 66, and the second source may be broadcast from 16 bits of memory.

What the entry leaves out#

The AVX10.2 specification (revision 7.0) treats denormal inputs as zeros and flushes denormal results, so a result that would fall below 2^-126 becomes zero. A denormal scale lies between -1 and 1 and, read as zero, scales by 1. Unlike VSCALEFPS’s entry, this one has no table of special cases for infinities, zeros and NaNs, and like VRCPBF16’s it lacks the sentence on exceptions and MXCSR that VADDBF16’s entry has, relying on exception class E4, defined in Section 4.2.5 as causing no SIMD floating-point exceptions.

Its routine also has a slip: the loop takes the j-th element of the second source and passes it to the scaling function with src1, the whole first source, where the description’s formula shows that the j-th element is meant.

In our builds#

GCC 14 has no AVX10.2 option. Clang 23 at -O2 with -mavx10.2 compiles _mm512_scalef_pbh to VSCALEFBF16. ldexpf on __bf16 elements is a library call per element by default; with -ffast-math, a constant exponent becomes VMULBF16 by a power of two, and an int array of exponents is converted with VCVTDQ2PS and applied with VSCALEFPS to the widened values, narrowed afterwards. No AVX10.2 processor appears in this site’s recorded cases.

Forms

Data flow

Where the elements of the sources go, element 0 on the right; results that depend on a control value are drawn for an example. How to read.

Operation

What the forms do, in pseudocode that our tests run against results recorded on real processors. How to read.

for i in range(VL // 16):
    if k1[i]:
        a = zmm2.bf16[i]
        b = src3.bf16[i]
        zmm1.bf16[i] = scalef(a, b)
    elif zeroing:
        zmm1.bf16[i] = 0
    # else: zmm1.bf16[i] keeps its value
# m16bcst: src3.bf16[i] is the m16 for every i
# BF16: to nearest even, denormals flushed, no flags; MXCSR unused
# zmm1 is zeroed from bit VL up

Operands

Flags

None: XED records no flag that the forms test or change.

Exceptions

The exception class is XED's name for the set of exception conditions that a form follows. How to read.

All forms

AVX512-E4

Attributes

What else XED records about the forms. How to read.

All forms

write masking; always rounds to nearest even; denormal inputs read as zero; denormal results flushed to zero

Memory forms

embedded broadcast (tuple Full); memory fault suppression

Intrinsics

The C intrinsics of Clang 23.1.2 that compile to VSCALEFBF16, each with the form it compiles to and the Clang options it needs. The forms come from compiling every intrinsic and decoding the result with Intel XED; all intrinsics A–Z explains the method.

CPUID and processors

Each form belongs to an XED ISA set. A form can be used when the processor reports every CPUID bit of one of its ISA set's alternatives.

More AVX10.2 instructions

• VFNMSUB132BF16
• VFNMSUB213BF16
• VFNMSUB231BF16
• VFPCLASSBF16
• VGETEXPBF16
• VGETMANTBF16
• VMAXBF16
• VMINBF16
• VMINMAXBF16
• VMINMAXPD
• VMINMAXPH
• VMINMAXPS
• VMINMAXSD
• VMINMAXSH
• VMINMAXSS
• VMOVD
• VMOVW
• VMPSADBW
• VMULBF16
• VPDPBSSD
• VPDPBSSDS
• VPDPBSUD
• VPDPBSUDS
• VPDPBUUD
• VPDPBUUDS
• VPDPWSUD
• VPDPWSUDS
• VPDPWUSD
• VPDPWUSDS
• VPDPWUUD
• VPDPWUUDS
• VRCPBF16
• VREDUCEBF16
• VRNDSCALEBF16
• VRSQRTBF16
• VSQRTBF16
• VSUBBF16
• VUCOMXSD
• VUCOMXSH
• VUCOMXSS

All 96 AVX10.2 instructions