Extensions
Forms
1 (1 EVEX)
Data
Intel XED v2026.08.23

Forms

Every encoding of VSCATTERPF0DPD that Intel XED knows, one row per XED instruction form (iform). How to read the notation.
InstructionEncodingRequires
VSCATTERPF0DPD vm32y {k} VSCATTERPF0DPD_MEMf64_MASKmskw_AVX512PF_VL512EVEX.512.66.0F38.W1 C6 /5AVX512PF

Operation

What the forms do, in pseudocode that our tests run against results recorded on real processors. How to read.

if not cpuid_leaf(7, 0)[1] >> 26 & 1:
    fault(UD)                    # CPUID: no AVX512PF
for i in range(8):               # 8 doubleword indices
    if k1[i]:                    # the elements selected
        a = mem.index.sd[i] * mem.scale
        a += mem.base            # the line that holds byte a may
                                 # come into the first-level cache
                                 # for writing (T0: RFO)
# nothing is written: k1 stays

Run on AMD Zen 5 (EPYC 9645): 1 case. It ran where CPUID reported no AVX512PF, and raised an exception.

Operands

What each form reads and writes, as Intel XED records it: the operands of its syntax, in order, and the implicit ones that the syntax does not name. How to read.
OperandKindAction
VSCATTERPF0DPD vm32y {k}
vm32yexplicitread (masked)
{k}explicitread, write (write mask)

Flags

None: XED records no flag that the forms test or change.

Exceptions

The exception class is XED's name for the set of exception conditions that a form follows. How to read.

All forms
AVX512-E12NP

Attributes

What else XED records about the forms. How to read.

All forms
memory operand only names cache lines; scatter; write masking; memory fault suppression

CPUID and processors

Each form belongs to an XED ISA set. A form can be used when the processor reports every CPUID bit of one of its ISA set's alternatives.

CPUID requirements and processors of the XED ISA sets above. Alternatives are separated by “or”; processors follow XED’s chip model, whose AMD processors end with Zen 2, and the CPU data of this site for Zen 3 to Zen 6.
ISA setCPUIDProcessors
AVX512PF_512

AVX512PF
CPUID.(EAX=07H,ECX=0):EBX[26] AVX512PF

Knights Landing, Knights Mill

More AVX512PF instructions

Sources

  1. Intel XED v2026.08.23 (commit 0bcb6237345c): forms, encodings, operands, flags, exception classes, attributes, ISA sets, CPUID bits and chip model.
  2. Intel 64 and IA-32 Architectures Software Developer's Manual, Volume 2 (325383-093, September 2026): Volume 2D, page 8-36 (VSCATTERPF0DPS/VSCATTERPF0QPS/VSCATTERPF0DPD/VSCATTERPF0QPD)

The tables are derived from Intel XED, Copyright Intel Corporation, licensed under the Apache License 2.0; x86-64.net converted and reformatted them. The text is our own.