VSQRTBF16

VSQRTBF16 takes the square root of each bfloat16 element, 8, 16 or 32 per register, rounded to nearest even; the AVX10.2 specification (revision 7.0) says the special inputs follow IEEE 754, so -0 gives -0 and other negative inputs a NaN. It belongs to AVX10.2 and follows the fixed rules on VADDBF16’s page: denormal inputs taken as zeros, no exceptions and no MXCSR. Its opcode is 51h in EVEX map 5 with the 66 prefix and W0, the byte of VSQRTPH, which has no prefix; it has one source, which may be broadcast from 16 bits of memory, and a write mask.

Denormals#

The root of a denormal is a normal number, but VSQRTBF16 never sees one: 0040h, 2^-127, is read as zero and gives zero, where the exact root, 2^-63.5, is about 1.1 × 10^-19.

In our builds#

GCC 14 has no AVX10.2 option. Clang 23 at -O2 with -mavx10.2 compiles _mm512_sqrt_pbh, which its header defines with __builtin_elementwise_sqrt, to VSQRTBF16, and a loop of that builtin over global __bf16 arrays to VSQRTBF16 on zmm registers with the source in memory. C’s sqrtf on a __bf16 never reaches it: by default the loop stays scalar, with VSQRTSS and a call to sqrtf for negative inputs; with -fno-math-errno it widens to singles, takes VSQRTPS on xmm registers and narrows with VCVTNEPS2BF16; with -ffast-math it uses VRSQRTPS and a Newton-Raphson step instead. A 1 / __builtin_elementwise_sqrt(x) loop is VSQRTBF16 and VDIVBF16, even with -ffast-math, never VRSQRTBF16. No AVX10.2 processor appears in this site’s recorded cases.

Forms

Data flow

Where the elements of the sources go, element 0 on the right; results that depend on a control value are drawn for an example. How to read.

Operation

What the forms do, in pseudocode that our tests run against results recorded on real processors. How to read.

for i in range(VL // 16):
    if k1[i]:
        zmm1.bf16[i] = sqrt(src2.bf16[i])
    elif zeroing:
        zmm1.bf16[i] = 0
    # else: zmm1.bf16[i] keeps its value
# m16bcst: src2.bf16[i] is the m16 for every i
# BF16: to nearest even, denormals flushed, no flags; MXCSR unused
# zmm1 is zeroed from bit VL up

Operands

Flags

None: XED records no flag that the forms test or change.

Exceptions

The exception class is XED's name for the set of exception conditions that a form follows. How to read.

All forms

AVX512-E4

Attributes

What else XED records about the forms. How to read.

All forms

write masking; always rounds to nearest even; denormal inputs read as zero; denormal results flushed to zero

Memory forms

embedded broadcast (tuple Full); memory fault suppression

Intrinsics

The C intrinsics of Clang 23.1.2 that compile to VSQRTBF16, each with the form it compiles to and the Clang options it needs. The forms come from compiling every intrinsic and decoding the result with Intel XED; all intrinsics A–Z explains the method.

CPUID and processors

Each form belongs to an XED ISA set. A form can be used when the processor reports every CPUID bit of one of its ISA set's alternatives.

More AVX10.2 instructions

• VFNMSUB132BF16
• VFNMSUB213BF16
• VFNMSUB231BF16
• VFPCLASSBF16
• VGETEXPBF16
• VGETMANTBF16
• VMAXBF16
• VMINBF16
• VMINMAXBF16
• VMINMAXPD
• VMINMAXPH
• VMINMAXPS
• VMINMAXSD
• VMINMAXSH
• VMINMAXSS
• VMOVD
• VMOVW
• VMPSADBW
• VMULBF16
• VPDPBSSD
• VPDPBSSDS
• VPDPBSUD
• VPDPBSUDS
• VPDPBUUD
• VPDPBUUDS
• VPDPWSUD
• VPDPWSUDS
• VPDPWUSD
• VPDPWUSDS
• VPDPWUUD
• VPDPWUUDS
• VRCPBF16
• VREDUCEBF16
• VRNDSCALEBF16
• VRSQRTBF16
• VSCALEFBF16
• VSUBBF16
• VUCOMXSD
• VUCOMXSH
• VUCOMXSS

All 96 AVX10.2 instructions