XABORT

XABORT ends an RTM transaction on purpose. Like any abort, it throws away the transaction’s stores, puts the registers back as they were at XBEGIN, and resumes at the fallback address of the outermost XBEGIN, with the status in EAX. For XABORT, bit 0 of EAX is set and bits 31:24 hold its 8-bit immediate, a code of the program’s choosing; bit 1, “a retry may succeed”, is always clear, and bit 5 is set when the abort came from a nested transaction. Outside a transaction XABORT does nothing at all. It is three bytes, C6 F8 ib.

Telling the fallback why#

The usual reason is a lock taken by another thread. Code that elides a lock starts a transaction, reads the lock, and calls _xabort when it is held, since running on would race with the holder; XEND’s page explains why reading it also aborts the transaction when the lock is taken later. The fallback then reads the code:

if ((s & _XABORT_EXPLICIT) && _XABORT_CODE(s) == 0xff)

With -mrtm, GCC 14 at -O2 compiles _xabort(0xff) to xabort 255 and that test to test al, 1, then shr eax, 24 and cmp eax, 255. Clang 23 folds the two checks into one: not eax and test eax, -16777215, that is FF000001H, zero only when bit 0 and all eight code bits are set. The code is an immediate, so _xabort takes a constant, and one XABORT site can report only one code.

Intel’s manual lists XABORT among the instructions that abort a transaction on every implementation, together with CPUID and PAUSE; XTEST tells code whether it runs inside one.

Where it runs#

XABORT needs RTM, CPUID.(EAX=7,ECX=0):EBX[11]; without it, it raises #UD even outside a transaction. XBEGIN’s page says where Intel’s microcode disables RTM. AMD’s manual defines no XABORT, and on this site’s Zen 5, both recorded cases, with codes 0 and 255, raised #UD.

Forms

Latency and throughput

Operation

What the forms do, in pseudocode that our tests run against results recorded on real processors. How to read.

if not cpuid_leaf(7, 0)[1] >> 11 & 1:
    fault(UD)                    # CPUID: no RTM
if rtm_active:
    s = imm << 24 | 1            # bit 0: XABORT; bits 31:24: imm8
    if rtm_nest > 1:
        s = s | 0x20             # bit 5: inside a nested one
    tx_abort(s)
# outside a transaction a NOP

Operands

Flags

None: XED records no flag that the forms test or change.

Intrinsics

The C intrinsics of Clang 23.1.2 that compile to XABORT, each with the form it compiles to and the Clang options it needs. The forms come from compiling every intrinsic and decoding the result with Intel XED; all intrinsics A–Z explains the method.

CPUID and processors

Each form belongs to an XED ISA set. A form can be used when the processor reports every CPUID bit of one of its ISA set's alternatives.

More RTM instructions

• XBEGIN
• XEND
• XTEST