XCRYPTECB instruction (VIA PadLock)

Forms

Every encoding of XCRYPTECB that Intel XED knows, one row per XED instruction form (iform). How to read the notation.

Instruction	Encoding	Requires
`REP XCRYPTECB` REP_XCRYPTECB	`F3 0F A7 C8`	VIA_PADLOCK_AES + VIA_PADLOCK_AES_EN

Operation

What the forms do, in pseudocode that our tests run against results recorded on real processors. How to read.

via = cpuid_leaf(0xC0000001, 0)[3]
if via >> 6 & 3 != 3:
    fault(UD)                    # CPUID: no ACE, or it is off
if not cr4 >> 9 & 1:
    fault(UD)                    # no SSE
c = low(rdx, ASIZE)              # the control word, 16 bytes
k = low(rbx, ASIZE)              # the key, or the round keys
if not key_loaded:               # RFLAGS bit 30 clear: the engine
    if (c | k) & 15:             # loads both, 16-byte aligned,
        fault(GP, 0)             # and keeps them for the next
    ace_load(c, k)
    key_loaded = 1
cw = ace_cw
n = aCX                          # blocks of 16 bytes
s = aSI
d = aDI
if ace_defined():
    if (s | d) & 15:             # ECB: aligned, whatever CW[5]
        fault(GP, 0)
    for i in range(n):
        x = load(s + 16 * i, 128)
        if cw >> 9 & 1:          # CW[9]: decryption
            y = ace_decrypt(x)
        else:
            y = ace_encrypt(x)
        store(d + 16 * i, 128, y)
    aSI = s + 16 * n
    aDI = d + 16 * n
    aCX = 0
else:                            # what VIA leaves undefined
    for i in range(n):
        store(d + 16 * i, 128, UNDEFINED)
    aSI = aDI = aCX = UNDEFINED
# the engine works on pairs of blocks: with an odd count it reads
# one block more than it writes, and with a count of 0 it may still
# read the first two, and fault on them

Run on AMD Zen 5 (EPYC 9645): 1 case. It ran where CPUID reported no PadLock ACE, and raised an exception.

Operands

What each form reads and writes, as Intel XED records it: the operands of its syntax, in order, and the implicit ones that the syntax does not name. How to read.

Operand	Kind	Action
`REP XCRYPTECB`
`m8 at ES:[rDI]`	implicit	write
`rCX`	implicit	read, write
`rDX`	implicit	read
`rBX`	implicit	read
`rDI`	implicit	read, write
`m8 at [rSI]`	implicit	conditional read
`rSI`	implicit	read, conditional write

Flags

None: XED records no flag that the forms test or change.

Attributes

What else XED records about the forms. How to read.

All forms: repeated: count in rCX

CPUID and processors

Each form belongs to an XED ISA set. A form can be used when the processor reports every CPUID bit of one of its ISA set's alternatives.

CPUID requirements and processors of the XED ISA sets above. Alternatives are separated by “or”; processors follow XED’s chip model, whose AMD processors end with Zen 2, and the CPU data of this site for Zen 3 to Zen 6.

ISA set	CPUID	Processors
`VIA_PADLOCK_AES` VIA PadLock	VIA_PADLOCK_AES + VIA_PADLOCK_AES_EN `CPUID.C0000001H:EDX[6]` VIA_PADLOCK_AES `CPUID.C0000001H:EDX[7]` VIA_PADLOCK_AES_EN	None in XED’s model.

XCRYPTECB