Clang 23.1.2 defines 7,575 x86 intrinsics. 6,341 of them compile to a single instruction of this reference and are listed below and on the instruction pages. 538 more compile to instructions that the reference does not cover yet, such as SSE instructions and AVX2 instructions without an AVX-512 form; 655 compile to several instructions or none, or have no instruction of their own; 26 are left out because their doc comment and compiled code disagree; and 15 could not be compiled on their own.

The list is sorted by the operation in the name, so _mm_add_ps, _mm256_add_ps and _mm512_mask_add_ps stand together under A. Each name links to its row on the instruction page, which shows the intrinsic’s signature, the exact form it compiles to and the Clang options it needs. Where an intrinsic compiles to more than one instruction depending on its operands, such as an FMA whose accumulator is already in the destination register, all of them are listed. Below the list is how intrinsics are matched to instructions.

A

B

C

D

E

F

G

H

I

K

L

M

O

P

R

S

T

U

W

X

How intrinsics are matched

The intrinsics come from the x86 headers of Clang 23.1.2 (commit 85ac56026243), which are part of the LLVM Project and licensed under the Apache License 2.0 with LLVM Exceptions. For each one, the build:

  • reads its signature, the target features it needs and what its doc comment says about instructions (“This intrinsic corresponds to the VPDPBUSD instruction”);
  • compiles a call to it with the Clang of the same release, for its own target features, and decodes the machine code with Intel XED. Variants of the call put another operand in the destination register or in memory, and add AVX to SSE intrinsics, which then compile to VEX forms;
  • lists it on an instruction page only if the call compiles to exactly that one instruction, apart from the code that passes arguments and returns the result.

Where Clang’s doc comment names an instruction, the compiled code must confirm it. It may compile to an instruction that does the same thing on the bits but claims another data type, such as VMOVAPS for a documented VMOVDQA; the intrinsic is then listed with the documented instruction. A few doc comments name the wrong instruction; those that concern this reference were checked by hand, and the instruction page says what the comment gets wrong.

Left out are intrinsics that compile to several instructions or to none, those that only zero a register, those built from a constant in memory (such as an absolute value made from a sign mask), those that Clang documents as having no instruction of their own, and those whose doc comment and compiled code disagree. Forms depend on the compiler: another compiler, or the same one with other options, can pick an equivalent instruction.

Sources

  1. The LLVM Project, whose Clang has the x86 intrinsic headers in clang/lib/Headers
  2. Intel XED, the X86 Encoder Decoder