x86-64.net

General-purpose

ADX

ADCX and ADOX add with a carry through CF alone or OF alone, so that two independent carry chains can run interleaved, as in multiplying big numbers.

CPUID
ADX
CPUID.(EAX=07H,ECX=0):EBX[19]
Instructions
2 mnemonics
Processors
Broadwell, Skylake, Comet Lake, Cannon Lake, Ice Lake (client), Tiger Lake, Alder Lake, Arrow Lake, Panther Lake, Nova Lake, Skylake-SP, Cascade Lake, Cooper Lake, Ice Lake (server), Sapphire Rapids, Emerald Rapids, Granite Rapids, Diamond Rapids, Sierra Forest, Clearwater Forest, Knights Landing, Knights Mill, Zen, Zen+, Zen 2
Linux flag
adx

Multiplying big numbers adds many partial products, each addition carrying into the next. ADC chains those carries through CF, but the other arithmetic flags change too, so two chains cannot run at once. ADCX adds with carry through CF and changes no other flag, and ADOX does the same through OF. Together with BMI2’s flagless MULX, they let a multiplication keep two independent carry chains in flight.

ADX came with Intel’s Broadwell and AMD’s Zen. APX adds three-operand forms.

Instructions

Mnemonics with at least one form in ADX. Each page lists all forms of the mnemonic, including those of other extensions.
MnemonicSummaryForms
ADCXAdds two unsigned integers and the carry flag and changes only CF, so a carry chain can run next to an ADOX chain; APX adds a three-operand form.4
ADOXAdds two unsigned integers and the overflow flag and changes only OF, so a carry chain can run next to an ADCX chain; APX adds a three-operand form.4

CPUID and processors

XED splits ADX into 1 ISA set. Software can use a form when the processor reports every CPUID bit of one alternative of the form's ISA set.

XED ISA sets of ADX. Alternatives are separated by “or”; processors follow XED’s chip model, which covers AMD processors up to Zen 2.
ISA setCPUIDProcessors in XED
ADOX_ADCX

ADX
CPUID.(EAX=07H,ECX=0):EBX[19] ADX

Broadwell, Skylake, Comet Lake, Cannon Lake, Ice Lake (client), Tiger Lake, Alder Lake, Arrow Lake, Panther Lake, Nova Lake, Skylake-SP, Cascade Lake, Cooper Lake, Ice Lake (server), Sapphire Rapids, Emerald Rapids, Granite Rapids, Diamond Rapids, Sierra Forest, Clearwater Forest, Knights Landing, Knights Mill, Zen, Zen+, Zen 2

Sources

  1. Intel XED v2026.08.23 (commit 0bcb6237345c): forms, encodings, ISA sets, CPUID bits and chip model.
  2. Intel 64 and IA-32 Architectures Software Developer's Manual, Volume 2 (325383-092, June 2026)

The tables are derived from Intel XED, Copyright Intel Corporation, licensed under the Apache License 2.0; x86-64.net converted and reformatted them. The text is our own.