AVX-NE-CONVERT instruction set extension

AVX-NE-CONVERT converts between single precision and the two 16-bit floating-point formats, bfloat16 and IEEE half precision, without AVX-512. “NE” stands for no exceptions: the instructions neither raise floating-point exceptions nor read or update MXCSR.

VCVTNEPS2BF16 rounds single-precision values to bfloat16.
VCVTNEEBF162PS and VCVTNEOBF162PS load a vector of bfloat16 values and widen the even or the odd elements to single precision; VCVTNEEPH2PS and VCVTNEOPH2PS do the same for half precision. Together they widen both halves of every 32-bit element.
VBCSTNEBF162PS and VBCSTNESH2PS broadcast one 16-bit value from memory to every single-precision element.

Widening bfloat16 is exact, since every bfloat16 value is a single-precision value with a shorter mantissa.

Instructions

Mnemonics with at least one form in AVX-NE-CONVERT. Each page lists all forms of the mnemonic, including those of other extensions.

Mnemonic	Summary	Forms
VBCSTNEBF162PS	Loads one bfloat16 value from memory, converts it to single precision and broadcasts it to every element, without floating-point exceptions.	2
VBCSTNESH2PS	Loads one half-precision value from memory, converts it to single precision and broadcasts it to every element, without floating-point exceptions.	2
VCVTNEEBF162PS	Converts the even-numbered bfloat16 values of a memory operand to single precision, without floating-point exceptions.	2
VCVTNEEPH2PS	Converts the even-numbered half-precision values of a memory operand to single precision, without floating-point exceptions.	2
VCVTNEOBF162PS	Converts the odd-numbered bfloat16 values of a memory operand to single precision, without floating-point exceptions.	2
VCVTNEOPH2PS	Converts the odd-numbered half-precision values of a memory operand to single precision, without floating-point exceptions.	2
VCVTNEPS2BF16	Converts packed single-precision values to bfloat16, rounding to nearest even with denormals flushed to zero and without consulting MXCSR.	4

CPUID and processors

XED splits AVX-NE-CONVERT into 1 ISA set. Software can use a form when the processor reports every CPUID bit of one alternative of the form's ISA set.

XED ISA sets of AVX-NE-CONVERT. Alternatives are separated by “or”; processors follow XED’s chip model, which covers AMD processors up to Zen 2.

ISA set	CPUID	Processors in XED
`AVX_NE_CONVERT` AVX-NE-CONVERT	AVX_NE_CONVERT `CPUID.(EAX=07H,ECX=1):EDX[5]` AVX_NE_CONVERT	Arrow Lake, Panther Lake, Nova Lake, Diamond Rapids, Sierra Forest, Clearwater Forest

Instructions

CPUID and processors

Sources