BMI2 instruction set extension

BMI2 adds eight VEX-encoded instructions for general-purpose registers:

SHLX, SHRX and SARX shift by a count in any register, and RORX rotates by an immediate; all four write a separate destination and leave the flags alone.
MULX multiplies RDX by a source into two destination registers without touching the flags, so it can mix with the carry chains of ADX.
BZHI clears the bits from a given position upward.
PDEP scatters the low bits of a value to the positions of a mask, and PEXT gathers the bits at those positions into the low bits.

BMI2 came with Intel’s Haswell and AMD’s Excavator, and is part of x86-64-v3.

Instructions

Mnemonics with at least one form in BMI2. Each page lists all forms of the mnemonic, including those of other extensions.

Mnemonic	Summary	Forms
BZHI	Clears the bits of the source from a given bit position upward; APX adds a form that leaves the flags unchanged.	4
MULX	Multiplies rDX by an unsigned operand and writes the high and low halves of the product to two registers without touching the flags.	4
PDEP	Deposits the low bits of the source at the bit positions selected by a mask, clearing the others.	4
PEXT	Extracts the bits of the source at the positions selected by a mask and packs them into the low bits of the destination.	4
RORX	Rotates the source right by an immediate count into a separate destination without touching the flags.	4
SARX	Shifts the source right arithmetically by a count in a register into a separate destination without touching the flags.	4
SHLX	Shifts the source left by a count in a register into a separate destination without touching the flags.	4
SHRX	Shifts the source right logically by a count in a register into a separate destination without touching the flags.	4

XED splits BMI2 into 1 ISA set. Software can use a form when the processor reports every CPUID bit of one alternative of the form's ISA set.

XED ISA sets of BMI2. Alternatives are separated by “or”; processors follow XED’s chip model, which covers AMD processors up to Zen 2.

ISA set	CPUID	Processors in XED
`BMI2` BMI2	BMI2 `CPUID.(EAX=07H,ECX=0):EBX[8]` BMI2	Haswell, Broadwell, Skylake, Comet Lake, Cannon Lake, Ice Lake (client), Tiger Lake, Alder Lake, Arrow Lake, Panther Lake, Nova Lake, Skylake-SP, Cascade Lake, Cooper Lake, Ice Lake (server), Sapphire Rapids, Emerald Rapids, Granite Rapids, Diamond Rapids, Sierra Forest, Clearwater Forest, Knights Landing, Knights Mill, Zen, Zen+, Zen 2