General-purpose
LAHF-SAHF
LAHF and SAHF in 64-bit mode, which the first x86-64 processors lacked there, so a CPUID bit says whether they work; they always work in the other modes.
- CPUID
- LAHF
CPUID.80000001H:ECX[0] - Instructions
- 2 mnemonics
- Processors
- Every x86-64 processor in XED’s model
- Linux flag
lahf_lm
LAHF copies the arithmetic flags SF, ZF, AF, PF and CF into AH, and SAHF writes them back, a cheaper way to save and restore them than PUSHF and POPF, which emulators and compilers use.
The first x86-64 processors, AMD’s early K8 revisions and Intel’s
NetBurst models with Intel 64, did not support them in 64-bit mode.
CPUID.80000001H:ECX[0] (Linux flag lahf_lm) says whether they work
there; in the other modes they always do. The bit is part of
x86-64-v2.
Instructions
CPUID and processors
XED splits LAHF-SAHF into 1 ISA set. Software can use a form when the processor reports every CPUID bit of one alternative of the form's ISA set.
| ISA set | CPUID | Processors in XED |
|---|---|---|
LAHF | LAHF | Every x86-64 processor in XED’s model |
Sources
- Intel XED v2026.08.23 (commit
0bcb6237345c): forms, encodings, ISA sets, CPUID bits and chip model. - Intel 64 and IA-32 Architectures Software Developer's Manual, Volume 2 (325383-092, June 2026)
- Intel 64 and IA-32 Architectures Software Developer's Manual, Volume 1 (253665-093, September 2026)
The tables are derived from Intel XED, Copyright Intel Corporation, licensed under the Apache License 2.0; x86-64.net converted and reformatted them. The text is our own.