x86-64.net

General-purpose

MOVBE

MOVBE loads or stores a value with its bytes reversed, converting between little- and big-endian data as it moves.

CPUID
MOVBE
CPUID.01H:ECX[22]
Instructions
1 mnemonic
Processors
Haswell, Broadwell, Skylake, Comet Lake, Cannon Lake, Ice Lake (client), Tiger Lake, Alder Lake, Arrow Lake, Panther Lake, Nova Lake, Skylake-SP, Cascade Lake, Cooper Lake, Ice Lake (server), Sapphire Rapids, Emerald Rapids, Granite Rapids, Diamond Rapids, Bonnell, Saltwell, Silvermont, Goldmont, Goldmont Plus, Tremont, Snow Ridge, Lakefield, Sierra Forest, Clearwater Forest, Knights Landing, Knights Mill, Zen, Zen+, Zen 2
Linux flag
movbe

MOVBE loads a 16-, 32- or 64-bit value from memory into a register, or stores one, reversing its bytes on the way: one instruction for what takes a load and a BSWAP otherwise. Network protocols and many file formats store numbers big-endian, and x86 is little-endian. There is no register-to-register form; BSWAP covers that.

MOVBE came first in Intel’s Atom and reached the large cores with Haswell; it is part of x86-64-v3. APX adds a register-to-register form.

Instructions

Mnemonics with at least one form in MOVBE. Each page lists all forms of the mnemonic, including those of other extensions.
MnemonicSummaryForms
MOVBELoads or stores a 16-, 32- or 64-bit value with its byte order reversed; APX adds a register-to-register form.2

CPUID and processors

XED splits MOVBE into 1 ISA set. Software can use a form when the processor reports every CPUID bit of one alternative of the form's ISA set.

XED ISA sets of MOVBE. Alternatives are separated by “or”; processors follow XED’s chip model, which covers AMD processors up to Zen 2.
ISA setCPUIDProcessors in XED
MOVBE

MOVBE
CPUID.01H:ECX[22] MOVBE

Haswell, Broadwell, Skylake, Comet Lake, Cannon Lake, Ice Lake (client), Tiger Lake, Alder Lake, Arrow Lake, Panther Lake, Nova Lake, Skylake-SP, Cascade Lake, Cooper Lake, Ice Lake (server), Sapphire Rapids, Emerald Rapids, Granite Rapids, Diamond Rapids, Bonnell, Saltwell, Silvermont, Goldmont, Goldmont Plus, Tremont, Snow Ridge, Lakefield, Sierra Forest, Clearwater Forest, Knights Landing, Knights Mill, Zen, Zen+, Zen 2

Sources

  1. Intel XED v2026.08.23 (commit 0bcb6237345c): forms, encodings, ISA sets, CPUID bits and chip model.
  2. Intel 64 and IA-32 Architectures Software Developer's Manual, Volume 2 (325383-092, June 2026)

The tables are derived from Intel XED, Copyright Intel Corporation, licensed under the Apache License 2.0; x86-64.net converted and reformatted them. The text is our own.