System
PCONFIG
PCONFIG configures platform features through leaf functions selected by EAX, such as programming the keys of multi-key total memory encryption; ring 0 only.
- CPUID
- PCONFIG
CPUID.(EAX=07H,ECX=0):EDX[18] - Instructions
- 1 mnemonic
- Processors
- Tiger Lake, Alder Lake, Arrow Lake, Panther Lake, Nova Lake, Ice Lake (server), Sapphire Rapids, Emerald Rapids, Granite Rapids, Diamond Rapids, Sierra Forest, Clearwater Forest
PCONFIG configures features of the platform outside the core, one leaf function per feature, selected by EAX, with RBX, RCX and RDX as operands. Its first use is multi-key total memory encryption: leaf 0 programs a key and its encryption mode for a key ID, which page tables then use to encrypt different memory with different keys. It runs only at privilege level 0, CPUID leaf 1BH lists the supported targets, and ZF reports a failure with a code in EAX.
Instructions
| Mnemonic | Summary | Forms |
|---|---|---|
| PCONFIG | Configures platform features, such as the keys of multi-key memory encryption, with the leaf function in EAX; ring 0 only. | 2 |
CPUID and processors
XED splits PCONFIG into 1 ISA set. Software can use a form when the processor reports every CPUID bit of one alternative of the form's ISA set.
| ISA set | CPUID | Processors |
|---|---|---|
PCONFIG | PCONFIG | Tiger Lake, Alder Lake, Arrow Lake, Panther Lake, Nova Lake, Ice Lake (server), Sapphire Rapids, Emerald Rapids, Granite Rapids, Diamond Rapids, Sierra Forest, Clearwater Forest |
Sources
- Intel XED v2026.08.23 (commit
0bcb6237345c): forms, encodings, ISA sets, CPUID bits and chip model. - Intel 64 and IA-32 Architectures Software Developer's Manual, Volume 2 (325383-093, September 2026)
The tables are derived from Intel XED, Copyright Intel Corporation, licensed under the Apache License 2.0; x86-64.net converted and reformatted them. The text is our own.