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System

SERIALIZE

SERIALIZE waits until all earlier instructions have completed and their stores have drained, without the register side effects of CPUID or the control transfer of IRET.

CPUID
SERIALIZE
CPUID.(EAX=07H,ECX=0):EDX[14]
Instructions
1 mnemonic
Processors
Alder Lake, Arrow Lake, Panther Lake, Nova Lake, Sapphire Rapids, Emerald Rapids, Granite Rapids, Diamond Rapids, Sierra Forest, Clearwater Forest

A serializing instruction makes the processor finish every earlier instruction and drain its buffered stores before it fetches the next one. Code that modifies other code, or that must be sure earlier work is complete, needs one. Before SERIALIZE, the usual choice was CPUID, which overwrites four registers and causes a VM exit under virtualization, or IRET, which changes control flow. SERIALIZE has no other effect, and Intel’s manual recommends it on processors that have it.

Instructions

Mnemonics with at least one form in SERIALIZE. Each page lists all forms of the mnemonic, including those of other extensions.
MnemonicSummaryForms
SERIALIZEWaits until earlier instructions have completed and their stores are visible before fetching the next, without the side effects of CPUID.1

CPUID and processors

XED splits SERIALIZE into 1 ISA set. Software can use a form when the processor reports every CPUID bit of one alternative of the form's ISA set.

XED ISA sets of SERIALIZE. Alternatives are separated by “or”; processors follow XED’s chip model, whose AMD processors end with Zen 2, and the CPU data of this site for Zen 3 to Zen 6.
ISA setCPUIDProcessors
SERIALIZE

SERIALIZE
CPUID.(EAX=07H,ECX=0):EDX[14] SERIALIZE

Alder Lake, Arrow Lake, Panther Lake, Nova Lake, Sapphire Rapids, Emerald Rapids, Granite Rapids, Diamond Rapids, Sierra Forest, Clearwater Forest

Sources

  1. Intel XED v2026.08.23 (commit 0bcb6237345c): forms, encodings, ISA sets, CPUID bits and chip model.
  2. Intel 64 and IA-32 Architectures Software Developer's Manual, Volume 2 (325383-093, September 2026)
  3. Intel 64 and IA-32 Architectures Software Developer's Manual, Volume 1 (253665-093, September 2026)

The tables are derived from Intel XED, Copyright Intel Corporation, licensed under the Apache License 2.0; x86-64.net converted and reformatted them. The text is our own.