SGX enclave instructions

Intel Software Guard Extensions (SGX) let an application keep code and data in an enclave: pages of a protected region, the Enclave Page Cache (EPC), that no other software can read, the operating system included. The operating system builds and manages enclaves with the leaf functions of ENCLS: ECREATE starts an enclave, EADD and EEXTEND add and measure its pages, EINIT completes it, and EWB and ELDU move pages out of the EPC and back. Applications use ENCLU: EENTER and EEXIT enter and leave an enclave, and EREPORT and EGETKEY serve attestation and sealing. SGX2 added leaves that change the pages of a running enclave, such as EAUG and EACCEPT.

XED decodes each of ENCLS, ENCLU and ENCLV as one instruction. Each leaf function has a page of its own, with its number from openly licensed code (the Linux kernel, Intel’s SGX SDK and Open Enclave) checked against Intel’s manual. ENCLV provided leaf functions for hypervisors; the manual of September 2026 no longer documents it, so the reference lists the instruction but none of its leaves. In XED’s chip model the client processors with SGX end with Tiger Lake, and Alder Lake and later client processors lack it, while the Xeon processors keep it.

Instructions

Mnemonics with at least one form in SGX. Each page lists all forms of the mnemonic, including those of other extensions.

Mnemonic	Summary	Forms
ENCLS	Performs the SGX leaf function for the operating system that EAX selects, such as ECREATE or EADD; only CPL 0 may run it.	1
ENCLU	Performs the SGX leaf function for applications and enclaves that EAX selects, such as EENTER or EGETKEY; only CPL 3 may run it.	1
ENCLV	Performs the SGX virtualization leaf function that EAX selects; XED decodes it, but Intel's manual of September 2026 no longer documents it.	1

Leaf functions

The operations that these instructions select by the value of a register, each with a page of its own.

ENCLS

EAX	Leaf function	Summary	Requires
`00H`	`ECREATE`	Starts building an enclave by copying its control structure, the SECS, from ordinary memory into a page of the EPC.	SGX1
`01H`	`EADD`	Copies a page from ordinary memory into the EPC for an enclave being built, and adds its offset and attributes to the enclave's measurement.	SGX1
`02H`	`EINIT`	Completes the build of an enclave: checks its signed SIGSTRUCT and launch token, fixes its measurement and makes it ready for EENTER.	SGX1
`03H`	`EREMOVE`	Removes a page from the EPC, detaching it from its enclave and marking it unused.	SGX1
`04H`	`EDBGRD`	Reads eight bytes (four outside 64-bit mode) of a debug enclave's memory, at the address in RCX, into RBX.	SGX1
`05H`	`EDBGWR`	Writes RBX (EBX outside 64-bit mode) to a debug enclave's memory at the address in RCX.	SGX1
`06H`	`EEXTEND`	Adds 256 bytes of a page of an enclave being built to the enclave's measurement, MRENCLAVE.	SGX1
`07H`	`ELDB`	Loads a page that EWB wrote out back into the EPC, checking and decrypting it, and marks it blocked.	SGX1
`08H`	`ELDU`	Loads a page that EWB wrote out back into the EPC, checking and decrypting it, and leaves it unblocked.	SGX1
`09H`	`EBLOCK`	Marks an EPC page as blocked, the first step of evicting it from the EPC.	SGX1
`0AH`	`EPA`	Turns an EPC page into a version array, which holds the versions of pages evicted from the EPC.	SGX1
`0BH`	`EWB`	Evicts a blocked EPC page: encrypts it, writes it to ordinary memory and keeps its version in a version array.	SGX1
`0CH`	`ETRACK`	Starts tracking the TLB flushes that must follow EBLOCK before the blocked pages of an enclave can be evicted.	SGX1
`0DH`	`EAUG`	Adds a zeroed page to an enclave that is already running; the enclave must accept it with EACCEPT or EACCEPTCOPY.	SGX2
`0EH`	`EMODPR`	Restricts the access rights of a page of a running enclave, which then accepts the change with EACCEPT.	SGX2
`0FH`	`EMODT`	Changes the type of a page of a running enclave, to trim it for example, which then accepts the change with EACCEPT.	SGX2
`18H`	`EUPDATESVN`	Updates the SGX security version of the processor to that of the loaded microcode update, when the EPC holds no valid page.	EUPDATESVN

ENCLU

EAX	Leaf function	Summary	Requires
`00H`	`EREPORT`	Creates a report of the running enclave that a target enclave on the same platform can verify, for local attestation.	SGX1
`01H`	`EGETKEY`	Returns a 128-bit key from the processor's key hierarchy, such as a sealing key, as a KEYREQUEST structure asks.	SGX1
`02H`	`EENTER`	Enters an enclave through one of its thread control structures (TCS), at the entry point that the TCS gives.	SGX1
`03H`	`ERESUME`	Re-enters an enclave that an exception or interrupt left, with the state saved in its SSA frame.	SGX1
`04H`	`EEXIT`	Leaves the running enclave and continues at the address in RBX, outside it.	SGX1
`05H`	`EACCEPT`	Lets a running enclave accept a change that system software made to one of its pages with EAUG, EMODT or EMODPR.	SGX2
`06H`	`EMODPE`	Extends the access rights of a page of the running enclave, which the enclave may do by itself.	SGX2
`07H`	`EACCEPTCOPY`	Initializes a page that EAUG added by copying another page of the enclave into it, and accepts it.	SGX2
`08H`	`EVERIFYREPORT2`	Checks, inside an enclave, the MAC of a report that a TDX trust domain created with SEAMREPORT.	EVERIFYREPORT2
`09H`	`EDECCSSA`	Decrements the index of the current SSA frame (TCS.CSSA) of the enclave thread, from inside the enclave.	EDECCSSA

CPUID and processors

XED splits SGX into 2 ISA sets. Software can use a form when the processor reports every CPUID bit of one alternative of the form's ISA set.

XED ISA sets of SGX. Alternatives are separated by “or”; processors follow XED’s chip model, whose AMD processors end with Zen 2, and the CPU data of this site for Zen 3 to Zen 6.

ISA set	CPUID	Processors
`SGX` SGX	SGX `CPUID.(EAX=07H,ECX=0):EBX[2]` SGX	Skylake, Comet Lake, Cannon Lake, Ice Lake (client), Tiger Lake, Skylake-SP, Cascade Lake, Cooper Lake, Ice Lake (server), Sapphire Rapids, Emerald Rapids, Granite Rapids, Diamond Rapids, Goldmont Plus
`SGX_ENCLV` SGX	No CPUID bit in Intel's current manuals, which no longer document ENCLV; XED gives the instruction no requirement of its own.	Tiger Lake, Ice Lake (server), Sapphire Rapids, Emerald Rapids, Granite Rapids, Diamond Rapids

Instructions

Leaf functions

ENCLS

ENCLU

CPUID and processors

Sources