SM4 instruction set extension

SM4 accelerates the SM4 block cipher, a Chinese national standard (GB/T 32907-2016) with 128-bit blocks and keys and 32 rounds. VSM4RNDS4 performs four encryption rounds and VSM4KEY4 four rounds of key expansion, independently in each 128-bit lane. The VEX forms work on 128- and 256-bit vectors. EVEX forms up to 512 bits followed; they need the SM4 bit together with AVX10, and Intel lists Diamond Rapids and Nova Lake as the first processors with them.

Instructions

Mnemonics with at least one form in SM4. Each page lists all forms of the mnemonic, including those of other extensions.

Mnemonic	Summary	Forms
VSM4KEY4	Performs four rounds of SM4 key expansion in each 128-bit lane.	10
VSM4RNDS4	Performs four rounds of SM4 encryption in each 128-bit lane.	10

CPUID and processors

XED splits SM4 into 4 ISA sets. Software can use a form when the processor reports every CPUID bit of one alternative of the form's ISA set.

XED ISA sets of SM4. Alternatives are separated by “or”; processors follow XED’s chip model, which covers AMD processors up to Zen 2.

ISA set	CPUID	Processors in XED
`SM4` SM4	SM4 + AVX `CPUID.(EAX=07H,ECX=1):EAX[2]` SM4 `CPUID.01H:ECX[28]` AVX	Arrow Lake, Panther Lake, Nova Lake, Diamond Rapids, Clearwater Forest
`SM4_128` SM4	SM4 + AVX10 `CPUID.(EAX=07H,ECX=1):EAX[2]` SM4 `CPUID.(EAX=07H,ECX=1):EDX[19]` AVX10	Nova Lake, Diamond Rapids
`SM4_256` SM4	SM4 + AVX10 `CPUID.(EAX=07H,ECX=1):EAX[2]` SM4 `CPUID.(EAX=07H,ECX=1):EDX[19]` AVX10	Nova Lake, Diamond Rapids
`SM4_512` SM4	SM4 + AVX10 `CPUID.(EAX=07H,ECX=1):EAX[2]` SM4 `CPUID.(EAX=07H,ECX=1):EDX[19]` AVX10	Nova Lake, Diamond Rapids

Instructions

CPUID and processors

Sources