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System

WAITPKG

UMONITOR, UMWAIT and TPAUSE let user code wait in a power-saving state for a store to an address or for a time-stamp deadline, instead of spinning.

CPUID
WAITPKG
CPUID.(EAX=07H,ECX=0):ECX[5]
Instructions
3 mnemonics
Processors
Alder Lake, Arrow Lake, Panther Lake, Nova Lake, Sapphire Rapids, Emerald Rapids, Granite Rapids, Diamond Rapids, Snow Ridge, Sierra Forest, Clearwater Forest
Linux flag
waitpkg

UMONITOR and UMWAIT are the user-level counterparts of MONITOR and MWAIT: the first arms the address monitor at an address in any register, the second waits until the range is written, an interrupt arrives or the time-stamp counter reaches the deadline in EDX:EAX. TPAUSE waits for the deadline alone. Bit 0 of their register operand chooses between a lighter wait state and a deeper one that saves more power but takes longer to leave.

They run at any privilege level, but the operating system keeps control: the IA32_UMWAIT_CONTROL MSR limits how long a wait may last and can forbid the deeper state. Spin-wait loops use them instead of PAUSE to save power while they wait for another core.

Instructions

Mnemonics with at least one form in WAITPKG. Each page lists all forms of the mnemonic, including those of other extensions.
MnemonicSummaryForms
TPAUSEWaits in a light or deeper power-saving state, chosen by bit 0 of a register, until the time-stamp counter reaches EDX:EAX.1
UMONITORArms the address monitor on the range holding the address in a register, at any privilege level, for a later UMWAIT.1
UMWAITWaits in a light or deeper power-saving state until the UMONITOR range is written, an interrupt arrives or the TSC reaches EDX:EAX.1

CPUID and processors

XED splits WAITPKG into 1 ISA set. Software can use a form when the processor reports every CPUID bit of one alternative of the form's ISA set.

XED ISA sets of WAITPKG. Alternatives are separated by “or”; processors follow XED’s chip model, whose AMD processors end with Zen 2, and the CPU data of this site for Zen 3 to Zen 6.
ISA setCPUIDProcessors
WAITPKG

WAITPKG
CPUID.(EAX=07H,ECX=0):ECX[5] WAITPKG

Alder Lake, Arrow Lake, Panther Lake, Nova Lake, Sapphire Rapids, Emerald Rapids, Granite Rapids, Diamond Rapids, Snow Ridge, Sierra Forest, Clearwater Forest

Sources

  1. Intel XED v2026.08.23 (commit 0bcb6237345c): forms, encodings, ISA sets, CPUID bits and chip model.
  2. Intel 64 and IA-32 Architectures Software Developer's Manual, Volume 2 (325383-093, September 2026)

The tables are derived from Intel XED, Copyright Intel Corporation, licensed under the Apache License 2.0; x86-64.net converted and reformatted them. The text is our own.