Vector (SSE, AVX and AVX10)
XOP
XOP, the extended operations of AMD's Bulldozer family, adds integer multiply-accumulate, horizontal adds, shifts and rotates per element, compares with a predicate and byte permutes, in an encoding of its own.
An AMD extension: Intel processors do not have this instruction.
- CPUID
- XOP
CPUID.80000001H:ECX[11] - Instructions
- 55 mnemonics
- Processors
- Bulldozer, Piledriver, Excavator, Steamroller (from the CPU data, which follows GCC)
- Linux flag
xop
Instructions
| Mnemonic | Summary | Forms |
|---|---|---|
| VFRCZPD | Extracts the fractional part of each packed double of an XMM or YMM operand, exactly; XOP. | 4 |
| VFRCZPS | Extracts the fractional part of each packed single of an XMM or YMM operand, exactly; XOP. | 4 |
| VFRCZSD | Extracts the fractional part of the low double of an XMM register or memory, exactly; XOP. | 2 |
| VFRCZSS | Extracts the fractional part of the low single of an XMM register or memory, exactly; XOP. | 2 |
| VPCMOV | Takes each bit from the first or the second source as the matching bit of a third source is set or clear; XOP. | 6 |
| VPCOMB | Compares packed signed bytes by the predicate an immediate selects, such as less than (VPCOMLTB), into all-ones or all-zeros bytes; XOP. | 2 |
| VPCOMD | Compares packed signed doublewords by the predicate an immediate selects, into all-ones or all-zeros doublewords; XOP. | 2 |
| VPCOMQ | Compares packed signed quadwords by the predicate an immediate selects, into all-ones or all-zeros quadwords; XOP. | 2 |
| VPCOMUB | Compares packed unsigned bytes by the predicate an immediate selects, into all-ones or all-zeros bytes; XOP. | 2 |
| VPCOMUD | Compares packed unsigned doublewords by the predicate an immediate selects, into all-ones or all-zeros doublewords; XOP. | 2 |
| VPCOMUQ | Compares packed unsigned quadwords by the predicate an immediate selects, into all-ones or all-zeros quadwords; XOP. | 2 |
| VPCOMUW | Compares packed unsigned words by the predicate an immediate selects, into all-ones or all-zeros words; XOP. | 2 |
| VPCOMW | Compares packed signed words by the predicate an immediate selects, into all-ones or all-zeros words; XOP. | 2 |
| VPERMIL2PD | Picks each double from either of two sources, or zero, by selectors in a third source and an immediate; XOP. | 6 |
| VPERMIL2PS | Picks each single from either of two sources, or zero, by selectors in a third source and an immediate; XOP. | 6 |
| VPHADDBD | Adds each group of four signed bytes into a signed doubleword; XOP. | 2 |
| VPHADDBQ | Adds each group of eight signed bytes into a signed quadword; XOP. | 2 |
| VPHADDBW | Adds each pair of adjacent signed bytes into a signed word; XOP. | 2 |
| VPHADDDQ | Adds each pair of adjacent signed doublewords into a signed quadword; XOP. | 2 |
| VPHADDUBD | Adds each group of four unsigned bytes into a doubleword; XOP. | 2 |
| VPHADDUBQ | Adds each group of eight unsigned bytes into a quadword; XOP. | 2 |
| VPHADDUBW | Adds each pair of adjacent unsigned bytes into a word; XOP. | 2 |
| VPHADDUDQ | Adds each pair of adjacent unsigned doublewords into a quadword; XOP. | 2 |
| VPHADDUWD | Adds each pair of adjacent unsigned words into a doubleword; XOP. | 2 |
| VPHADDUWQ | Adds each group of four unsigned words into a quadword; XOP. | 2 |
| VPHADDWD | Adds each pair of adjacent signed words into a signed doubleword; XOP. | 2 |
| VPHADDWQ | Adds each group of four signed words into a signed quadword; XOP. | 2 |
| VPHSUBBW | Subtracts the high signed byte from the low one of each word, into signed words; XOP. | 2 |
| VPHSUBDQ | Subtracts the high signed doubleword from the low one of each quadword, into signed quadwords; XOP. | 2 |
| VPHSUBWD | Subtracts the high signed word from the low one of each doubleword, into signed doublewords; XOP. | 2 |
| VPMACSDD | Multiplies packed signed doublewords and adds a third source to the products, keeping the low 32 bits without saturation; XOP. | 2 |
| VPMACSDQH | Multiplies the odd signed doublewords of two sources into quadwords and adds the quadwords of a third source; XOP. | 2 |
| VPMACSDQL | Multiplies the even signed doublewords of two sources into quadwords and adds the quadwords of a third source; XOP. | 2 |
| VPMACSSDD | Multiplies packed signed doublewords and adds a third source to the products, with signed saturation to doublewords; XOP. | 2 |
| VPMACSSDQH | Multiplies the odd signed doublewords of two sources and adds a third source's quadwords, with signed saturation; XOP. | 2 |
| VPMACSSDQL | Multiplies the even signed doublewords of two sources and adds a third source's quadwords, with signed saturation; XOP. | 2 |
| VPMACSSWD | Multiplies the odd signed words of two sources and adds a third source's doublewords, with signed saturation; XOP. | 2 |
| VPMACSSWW | Multiplies packed signed words and adds a third source's words to the products, with signed saturation; XOP. | 2 |
| VPMACSWD | Multiplies the odd signed words of two sources and adds a third source's doublewords, without saturation; XOP. | 2 |
| VPMACSWW | Multiplies packed signed words and adds a third source's words to the products, keeping the low 16 bits; XOP. | 2 |
| VPMADCSSWD | Multiplies packed signed words, adds adjacent products and a third source's doublewords, with signed saturation; XOP. | 2 |
| VPMADCSWD | Multiplies packed signed words, adds adjacent products and a third source's doublewords, without saturation; XOP. | 2 |
| VPPERM | Picks each byte of the result from 32 bytes of two sources and optionally inverts, reverses or replaces it, by selectors in a third; XOP. | 3 |
| VPROTB | Rotates each byte left or right by a signed count from an immediate or the matching byte of a register or memory; XOP. | 5 |
| VPROTD | Rotates each doubleword left or right by a signed count from an immediate or a register or memory; XOP. | 5 |
| VPROTQ | Rotates each quadword left or right by a signed count from an immediate or a register or memory; XOP. | 5 |
| VPROTW | Rotates each word left or right by a signed count from an immediate or a register or memory; XOP. | 5 |
| VPSHAB | Shifts each signed byte arithmetically left or right by the signed count in the matching byte of a second source; XOP. | 3 |
| VPSHAD | Shifts each signed doubleword arithmetically left or right by a signed count per element; XOP. | 3 |
| VPSHAQ | Shifts each signed quadword arithmetically left or right by a signed count per element; XOP. | 3 |
| VPSHAW | Shifts each signed word arithmetically left or right by a signed count per element; XOP. | 3 |
| VPSHLB | Shifts each byte logically left or right by the signed count in the matching byte of a second source; XOP. | 3 |
| VPSHLD | Shifts each doubleword logically left or right by a signed count per element; XOP. | 3 |
| VPSHLQ | Shifts each quadword logically left or right by a signed count per element; XOP. | 3 |
| VPSHLW | Shifts each word logically left or right by a signed count per element; XOP. | 3 |
CPUID and processors
XED splits XOP into 1 ISA set. Software can use a form when the processor reports every CPUID bit of one alternative of the form's ISA set.
| ISA set | CPUID | Processors |
|---|---|---|
XOP | XOP | Bulldozer, Piledriver |
Sources
- Intel XED v2026.08.23 (commit
0bcb6237345c): forms, encodings, ISA sets, CPUID bits and chip model. - AMD64 Architecture Programmer's Manual, Volume 4: 128-Bit and 256-Bit Media Instructions (26568, rev. 3.25, November 2021), Wayback Machine copy of AMD's PDF
The tables are derived from Intel XED, Copyright Intel Corporation, licensed under the Apache License 2.0; x86-64.net converted and reformatted them. The text is our own.